[IA64] Rationalise Region Definitions
Currently, region numbers are defined in several files, with several names. For example, we have REGION_KERNEL in asm/page.h and RGN_KERNEL in pgtable.h We also have address definitions that should depend on the RGN_XXX macros, but are currently just long constants. The following patch reorganises all the definitions so that they have the same form (RGN_XXX), are in one place, and that addresses that depend on RGN_XXX are derived from them. (This is a necessary but not sufficient patch to allow UML-like operation on IA64). Thanks to David Mosberger for catching the change I missed in mmu_context.h. Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len
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return -ENOMEM;
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#ifdef CONFIG_HUGETLB_PAGE
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if (REGION_NUMBER(addr) == REGION_HPAGE)
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if (REGION_NUMBER(addr) == RGN_HPAGE)
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addr = 0;
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#endif
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if (!addr)
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@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len)
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return -EINVAL;
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if (addr & ~HPAGE_MASK)
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return -EINVAL;
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if (REGION_NUMBER(addr) != REGION_HPAGE)
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if (REGION_NUMBER(addr) != RGN_HPAGE)
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return -EINVAL;
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return 0;
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@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ
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struct page *page;
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pte_t *ptep;
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if (REGION_NUMBER(addr) != REGION_HPAGE)
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if (REGION_NUMBER(addr) != RGN_HPAGE)
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return ERR_PTR(-EINVAL);
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ptep = huge_pte_offset(mm, addr);
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@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u
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return -ENOMEM;
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if (len & ~HPAGE_MASK)
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return -EINVAL;
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/* This code assumes that REGION_HPAGE != 0. */
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if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1)))
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/* This code assumes that RGN_HPAGE != 0. */
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if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1)))
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addr = HPAGE_REGION_BASE;
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else
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addr = ALIGN(addr, HPAGE_SIZE);
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@ -23,7 +23,7 @@
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#define __SLOW_DOWN_IO do { } while (0)
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#define SLOW_DOWN_IO do { } while (0)
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#define __IA64_UNCACHED_OFFSET 0xc000000000000000UL /* region 6 */
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#define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED)
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/*
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* The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
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@ -19,6 +19,7 @@
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#define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61))
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# include <asm/page.h>
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# ifndef __ASSEMBLY__
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#include <linux/compiler.h>
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@ -110,7 +111,7 @@ reload_context (mm_context_t context)
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unsigned long rid_incr = 0;
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unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4;
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old_rr4 = ia64_get_rr(0x8000000000000000UL);
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old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE));
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rid = context << 3; /* make space for encoding the region number */
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rid_incr = 1 << 8;
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@ -122,6 +123,10 @@ reload_context (mm_context_t context)
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rr4 = rr0 + 4*rid_incr;
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#ifdef CONFIG_HUGETLB_PAGE
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rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc);
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# if RGN_HPAGE != 4
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# error "reload_context assumes RGN_HPAGE is 4"
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# endif
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#endif
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ia64_set_rr(0x0000000000000000UL, rr0);
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@ -12,6 +12,19 @@
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#include <asm/intrinsics.h>
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#include <asm/types.h>
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/*
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* The top three bits of an IA64 address are its Region Number.
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* Different regions are assigned to different purposes.
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*/
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#define RGN_SHIFT (61)
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#define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT)
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#define KHIGH -1 /* high three bits of Kernel virtual address */
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#define RGN_KERNEL 7 /* Identity mapped region */
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#define RGN_UNCACHED 6 /* Identity mapped I/O region */
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#define RGN_GATE 5 /* Gate page, Kernel text, etc */
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#define RGN_HPAGE 4 /* For Huge TLB pages */
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/*
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* PAGE_SHIFT determines the actual kernel page size.
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*/
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@ -36,10 +49,9 @@
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#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */
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#ifdef CONFIG_HUGETLB_PAGE
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# define REGION_HPAGE (4UL) /* note: this is hardcoded in reload_context()!*/
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# define REGION_SHIFT 61
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# define HPAGE_REGION_BASE (REGION_HPAGE << REGION_SHIFT)
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# define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE)
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# define HPAGE_SHIFT hpage_shift
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# define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */
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# define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT)
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@ -130,16 +142,13 @@ typedef union ia64_va {
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#define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;})
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#define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;})
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#define REGION_SIZE REGION_NUMBER(1)
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#define REGION_KERNEL 7
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#ifdef CONFIG_HUGETLB_PAGE
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# define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \
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| (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
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# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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# define is_hugepage_only_range(mm, addr, len) \
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(REGION_NUMBER(addr) == REGION_HPAGE && \
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REGION_NUMBER((addr)+(len)-1) == REGION_HPAGE)
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(REGION_NUMBER(addr) == RGN_HPAGE && \
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REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE)
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extern unsigned int hpage_shift;
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#endif
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@ -197,7 +206,7 @@ get_order (unsigned long size)
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# define __pgprot(x) (x)
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#endif /* !STRICT_MM_TYPECHECKS */
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#define PAGE_OFFSET __IA64_UL_CONST(0xe000000000000000)
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#define PAGE_OFFSET RGN_BASE(RGN_KERNEL)
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \
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@ -204,21 +204,18 @@ ia64_phys_addr_valid (unsigned long addr)
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#define set_pte(ptep, pteval) (*(ptep) = (pteval))
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#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
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#define RGN_SIZE (1UL << 61)
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#define RGN_KERNEL 7
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#define VMALLOC_START 0xa000000200000000UL
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#define VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL)
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#ifdef CONFIG_VIRTUAL_MEM_MAP
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# define VMALLOC_END_INIT (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9)))
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# define VMALLOC_END_INIT (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
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# define VMALLOC_END vmalloc_end
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extern unsigned long vmalloc_end;
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#else
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# define VMALLOC_END (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9)))
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# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
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#endif
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/* fs/proc/kcore.c */
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#define kc_vaddr_to_offset(v) ((v) - 0xa000000000000000UL)
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#define kc_offset_to_vaddr(o) ((o) + 0xa000000000000000UL)
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#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE))
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#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE))
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/*
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* Conversion functions: convert page frame number (pfn) and a protection value to a page
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@ -19,12 +19,13 @@
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#include <asm/pal.h>
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#include <asm/percpu.h>
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#define GATE_ADDR __IA64_UL_CONST(0xa000000000000000)
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#define GATE_ADDR RGN_BASE(RGN_GATE)
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/*
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* 0xa000000000000000+2*PERCPU_PAGE_SIZE
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* - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
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*/
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#define KERNEL_START __IA64_UL_CONST(0xa000000100000000)
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#define KERNEL_START (GATE_ADDR+0x100000000)
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#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
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#ifndef __ASSEMBLY__
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