PCI: remove unused arch pcibios_update_resource() functions
Russell King did the following back in 2003: <-- snip --> [PCI] pci-9: Kill per-architecture pcibios_update_resource() Kill pcibios_update_resource(), replacing it with pci_update_resource(). pci_update_resource() uses pcibios_resource_to_bus() to convert a resource to a device BAR - the transformation should be exactly the same as the transformation used for the PCI bridges. pci_update_resource "knows" about 64-bit BARs, but doesn't attempt to set the high 32-bits to anything non-zero - currently no architecture attempts to do something different. If anyone cares, please fix; I'm going to reflect current behaviour for the time being. Ivan pointed out the following architectures need to examine their pcibios_update_resource() implementation - they should make sure that this new implementation does the right thing. #warning's have been added where appropriate. ia64 mips mips64 This cset also includes a fix for the problem reported by AKPM where 64-bit arch compilers complain about the resource mask being placed in a u32. <-- snip --> This patch removes the unused pcibios_update_resource() functions the kernel gained since, from FRV, m68k, mips & sh architectures. Signed-off-by: Adrian Bunk <bunk@kernel.org> Acked-by: David Howells <dhowells@redhat.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -19,36 +19,6 @@
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#include "pci-frv.h"
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#if 0
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void
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pcibios_update_resource(struct pci_dev *dev, struct resource *root,
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struct resource *res, int resource)
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{
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u32 new, check;
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int reg;
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new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
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if (resource < 6) {
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reg = PCI_BASE_ADDRESS_0 + 4*resource;
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} else if (resource == PCI_ROM_RESOURCE) {
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res->flags |= IORESOURCE_ROM_ENABLE;
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new |= PCI_ROM_ADDRESS_ENABLE;
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reg = dev->rom_base_reg;
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} else {
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/* Somebody might have asked allocation of a non-standard resource */
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return;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
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printk(KERN_ERR "PCI: Error while updating region "
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"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
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new, check);
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}
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}
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#endif
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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@ -373,15 +373,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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return(0);
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}
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/*****************************************************************************/
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void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *r, int resource)
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{
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printk(KERN_WARNING "%s(%d): no support for changing PCI resources...\n",
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__FILE__, __LINE__);
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}
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/*****************************************************************************/
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/*
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@ -345,42 +345,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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return pcibios_enable_resources(dev);
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}
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void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
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struct resource *res, int resource)
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{
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u32 new, check;
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int reg;
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return;
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new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
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if (resource < 6) {
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reg = PCI_BASE_ADDRESS_0 + 4 * resource;
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} else if (resource == PCI_ROM_RESOURCE) {
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res->flags |= IORESOURCE_ROM_ENABLE;
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reg = dev->rom_base_reg;
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} else {
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/*
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* Somebody might have asked allocation of a non-standard
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* resource
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*/
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return;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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if ((new ^ check) &
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((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK :
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PCI_BASE_ADDRESS_MEM_MASK)) {
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printk(KERN_ERR "PCI: Error while updating region "
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"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
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new, check);
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}
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}
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void pcibios_align_resource(void *data, struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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@ -76,38 +76,6 @@ void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
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pci_read_bridge_bases(bus);
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}
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void
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pcibios_update_resource(struct pci_dev *dev, struct resource *root,
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struct resource *res, int resource)
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{
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u32 new, check;
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int reg;
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new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
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if (resource < 6) {
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reg = PCI_BASE_ADDRESS_0 + 4*resource;
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} else if (resource == PCI_ROM_RESOURCE) {
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res->flags |= IORESOURCE_ROM_ENABLE;
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new |= PCI_ROM_ADDRESS_ENABLE;
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reg = dev->rom_base_reg;
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} else {
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/*
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* Somebody might have asked allocation of a non-standard
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* resource
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*/
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return;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ?
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PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
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printk(KERN_ERR "PCI: Error while updating region "
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"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
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new, check);
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}
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}
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void pcibios_align_resource(void *data, struct resource *res,
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resource_size_t size, resource_size_t align)
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__attribute__ ((weak));
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