luck/tmp_suning_uos_patched
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

[POWERPC] 4xx: Add PCI entry to 440GRx Rainier DTS.

Browse Source 
This adds PCI entry to PowerPC 440GRx Rainier DTS.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This commit is contained in:
Valentine Barshak 2007-12-22 04:22:39 +11:00 committed by Josh Boyer
parent 14b3d926a2
commit 0b2e97518d
1 changed files with 27 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
arch/powerpc/boot/dts/rainier.dts
View File

@ -308,6 +308,33 @@ EMAC1: ethernet@ef600f00 {
has-new-stacr-staopc;
};
};
PCI0: pci@1ec000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
primary;
reg = <1 eec00000 8 /* Config space access */
1 eed00000 4 /* IACK */
1 eed00000 4 /* Special cycle */
1 ef400000 40>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <02000000 0 80000000 1 80000000 0 10000000
01000000 0 00000000 1 e8000000 0 00100000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 0 80000000>;
/* All PCI interrupts are routed to IRQ 67 */
interrupt-map-mask = <0000 0 0 0>;
interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
};
};
chosen {