[MIPS] FPU hazard handling
Move FPU hazard handling to hazards.h and provide proper support for MIPSR2 processors Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -16,6 +16,7 @@
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#include <asm/mipsregs.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/hazards.h>
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#include <asm/bitops.h>
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#include <asm/processor.h>
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#include <asm/current.h>
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@ -38,34 +39,16 @@ extern void _init_fpu(void);
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extern void _save_fp(struct task_struct *);
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extern void _restore_fp(struct task_struct *);
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#if defined(CONFIG_CPU_SB1)
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#define __enable_fpu_hazard() \
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do { \
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asm(".set push \n\t" \
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".set mips64 \n\t" \
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".set noreorder \n\t" \
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"ssnop \n\t" \
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"bnezl $0, .+4 \n\t" \
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"ssnop \n\t" \
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".set pop"); \
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} while (0)
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#else
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#define __enable_fpu_hazard() \
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do { \
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asm("nop;nop;nop;nop"); /* max. hazard */ \
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} while (0)
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#endif
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#define __enable_fpu() \
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do { \
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set_c0_status(ST0_CU1); \
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__enable_fpu_hazard(); \
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enable_fpu_hazard(); \
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} while (0)
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#define __disable_fpu() \
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do { \
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clear_c0_status(ST0_CU1); \
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/* We don't care about the c0 hazard here */ \
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disable_fpu_hazard(); \
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} while (0)
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#define enable_fpu() \
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@ -178,4 +178,36 @@ ASMMACRO(back_to_back_c0_hazard,
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#endif
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/* FPU hazards */
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#if defined(CONFIG_CPU_SB1)
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ASMMACRO(enable_fpu_hazard,
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.set push;
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.set mips64;
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.set noreorder;
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_ssnop;
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bnezl $0,.+4;
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_ssnop
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.set pop
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)
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ASMMACRO(disable_fpu_hazard,
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)
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#elif defined(CONFIG_CPU_MIPSR2)
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ASMMACRO(enable_fpu_hazard,
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_ehb
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)
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ASMMACRO(disable_fpu_hazard,
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_ehb
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)
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#else
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ASMMACRO(enable_fpu_hazard,
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nop; nop; nop; nop
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)
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ASMMACRO(disable_fpu_hazard,
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_ehb
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)
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#endif
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#endif /* _ASM_HAZARDS_H */
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