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KVM: x86 emulator: add Src2 decode set

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Instruction like shld has three operands, so we need to add a Src2
decode set. We start with Src2None, Src2CL, and Src2ImmByte, Src2One to
support shld/shrd and we will expand it later.

Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Guillaume Thouvenin 2008-12-04 14:26:42 +01:00 committed by Avi Kivity
parent 45ed60b371
commit 0dc8d10f7d
2 changed files with 30 additions and 0 deletions
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1
arch/x86/include/asm/kvm_x86_emulate.h
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@ -123,6 +123,7 @@ struct decode_cache {
u8 ad_bytes; u8 ad_bytes;
u8 rex_prefix; u8 rex_prefix;
struct operand src; struct operand src;
struct operand src2;
struct operand dst; struct operand dst;
bool has_seg_override; bool has_seg_override;
u8 seg_override; u8 seg_override;

29
arch/x86/kvm/x86_emulate.c
View File

@ -70,6 +70,12 @@
#define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ #define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */
#define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */
#define GroupMask 0xff /* Group number stored in bits 0:7 */ #define GroupMask 0xff /* Group number stored in bits 0:7 */
/* Source 2 operand type */
#define Src2None (0<<29)
#define Src2CL (1<<29)
#define Src2ImmByte (2<<29)
#define Src2One (3<<29)
#define Src2Mask (7<<29)
enum { enum {
Group1_80, Group1_81, Group1_82, Group1_83, Group1_80, Group1_81, Group1_82, Group1_83,
@ -1000,6 +1006,29 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
break; break;
} }
/*
* Decode and fetch the second source operand: register, memory
* or immediate.
*/
switch (c->d & Src2Mask) {
case Src2None:
break;
case Src2CL:
c->src2.bytes = 1;
c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
break;
case Src2ImmByte:
c->src2.type = OP_IMM;
c->src2.ptr = (unsigned long *)c->eip;
c->src2.bytes = 1;
c->src2.val = insn_fetch(u8, 1, c->eip);
break;
case Src2One:
c->src2.bytes = 1;
c->src2.val = 1;
break;
}
/* Decode and fetch the destination operand: register or memory. */ /* Decode and fetch the destination operand: register or memory. */
switch (c->d & DstMask) { switch (c->d & DstMask) {
case ImplicitOps: case ImplicitOps: