mmc-omap: add support for 16-bit and 32-bit registers
The omap850 and omap730 use 16-bit registers instead of 32-bit, requiring a modification of the register addresses in the mmc-omap driver. To resolve this, a bit shift is performed on base register addresses, either by 1 or 2 bits depending on the CPU in use. This yields the correct registers for each CPU. Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com> Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ben Dooks <ben@fluff.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -39,30 +39,30 @@
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#include <plat/fpga.h>
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#define OMAP_MMC_REG_CMD 0x00
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#define OMAP_MMC_REG_ARGL 0x04
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#define OMAP_MMC_REG_ARGH 0x08
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#define OMAP_MMC_REG_CON 0x0c
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#define OMAP_MMC_REG_STAT 0x10
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#define OMAP_MMC_REG_IE 0x14
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#define OMAP_MMC_REG_CTO 0x18
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#define OMAP_MMC_REG_DTO 0x1c
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#define OMAP_MMC_REG_DATA 0x20
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#define OMAP_MMC_REG_BLEN 0x24
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#define OMAP_MMC_REG_NBLK 0x28
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#define OMAP_MMC_REG_BUF 0x2c
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#define OMAP_MMC_REG_SDIO 0x34
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#define OMAP_MMC_REG_REV 0x3c
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#define OMAP_MMC_REG_RSP0 0x40
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#define OMAP_MMC_REG_RSP1 0x44
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#define OMAP_MMC_REG_RSP2 0x48
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#define OMAP_MMC_REG_RSP3 0x4c
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#define OMAP_MMC_REG_RSP4 0x50
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#define OMAP_MMC_REG_RSP5 0x54
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#define OMAP_MMC_REG_RSP6 0x58
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#define OMAP_MMC_REG_RSP7 0x5c
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#define OMAP_MMC_REG_IOSR 0x60
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#define OMAP_MMC_REG_SYSC 0x64
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#define OMAP_MMC_REG_SYSS 0x68
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#define OMAP_MMC_REG_ARGL 0x01
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#define OMAP_MMC_REG_ARGH 0x02
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#define OMAP_MMC_REG_CON 0x03
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#define OMAP_MMC_REG_STAT 0x04
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#define OMAP_MMC_REG_IE 0x05
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#define OMAP_MMC_REG_CTO 0x06
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#define OMAP_MMC_REG_DTO 0x07
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#define OMAP_MMC_REG_DATA 0x08
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#define OMAP_MMC_REG_BLEN 0x09
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#define OMAP_MMC_REG_NBLK 0x0a
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#define OMAP_MMC_REG_BUF 0x0b
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#define OMAP_MMC_REG_SDIO 0x0d
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#define OMAP_MMC_REG_REV 0x0f
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#define OMAP_MMC_REG_RSP0 0x10
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#define OMAP_MMC_REG_RSP1 0x11
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#define OMAP_MMC_REG_RSP2 0x12
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#define OMAP_MMC_REG_RSP3 0x13
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#define OMAP_MMC_REG_RSP4 0x14
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#define OMAP_MMC_REG_RSP5 0x15
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#define OMAP_MMC_REG_RSP6 0x16
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#define OMAP_MMC_REG_RSP7 0x17
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#define OMAP_MMC_REG_IOSR 0x18
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#define OMAP_MMC_REG_SYSC 0x19
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#define OMAP_MMC_REG_SYSS 0x1a
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#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
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#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
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@ -78,8 +78,9 @@
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#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
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#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
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#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
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#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
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#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift)
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#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
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#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
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/*
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* Command types
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@ -133,6 +134,7 @@ struct mmc_omap_host {
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int irq;
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unsigned char bus_mode;
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unsigned char hw_bus_mode;
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unsigned int reg_shift;
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struct work_struct cmd_abort_work;
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unsigned abort:1;
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@ -680,9 +682,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
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host->data->bytes_xfered += n;
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if (write) {
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__raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
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__raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
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} else {
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__raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
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__raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
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}
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}
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@ -900,7 +902,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
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int dst_port = 0;
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int sync_dev = 0;
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data_addr = host->phys_base + OMAP_MMC_REG_DATA;
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data_addr = host->phys_base + OMAP_MMC_REG(host, DATA);
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frame = data->blksz;
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count = sg_dma_len(sg);
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@ -1493,6 +1495,8 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
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}
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}
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host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
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return 0;
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err_plat_cleanup:
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