[ARM] JIVE: Add setup information for the S3C2412 LCD controller
Setup the video controller information for the Jive. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -34,6 +34,7 @@
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-mem.h>
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#include <asm/arch/regs-lcd.h>
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#include <asm/arch/fb.h>
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#include <asm/mach-types.h>
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@ -256,11 +257,101 @@ static int __init jive_mtdset(char *options)
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/* parse the mtdset= option given to the kernel command line */
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__setup("mtdset=", jive_mtdset);
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/* LCD timing and setup */
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#define LCD_XRES (240)
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#define LCD_YRES (320)
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#define LCD_LEFT_MARGIN (12)
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#define LCD_RIGHT_MARGIN (12)
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#define LCD_LOWER_MARGIN (12)
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#define LCD_UPPER_MARGIN (12)
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#define LCD_VSYNC (2)
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#define LCD_HSYNC (2)
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#define LCD_REFRESH (60)
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#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
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#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
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struct s3c2410fb_display jive_vgg2432a4_display[] = {
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[0] = {
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.width = LCD_XRES,
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.height = LCD_YRES,
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.xres = LCD_XRES,
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.yres = LCD_YRES,
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.left_margin = LCD_LEFT_MARGIN,
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.right_margin = LCD_RIGHT_MARGIN,
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.upper_margin = LCD_UPPER_MARGIN,
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.lower_margin = LCD_LOWER_MARGIN,
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.hsync_len = LCD_HSYNC,
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.vsync_len = LCD_VSYNC,
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.pixclock = (1000000000000LL /
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(LCD_REFRESH * LCD_HTOT * LCD_VTOT)),
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.bpp = 16,
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.type = (S3C2410_LCDCON1_TFT16BPP |
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S3C2410_LCDCON1_TFT),
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.lcdcon5 = (S3C2410_LCDCON5_FRM565 |
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S3C2410_LCDCON5_INVVLINE |
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S3C2410_LCDCON5_INVVFRAME |
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S3C2410_LCDCON5_INVVDEN |
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S3C2410_LCDCON5_PWREN),
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},
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};
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/* todo - put into gpio header */
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#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
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#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
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struct s3c2410fb_mach_info jive_lcd_config = {
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.displays = jive_vgg2432a4_display,
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.num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
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.default_display = 0,
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/* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
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* and disable the pull down resistors on pins we are using for LCD
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* data. */
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.gpcup = (0xf << 1) | (0x3f << 10),
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.gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE |
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S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
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S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 |
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S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 |
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S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7),
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.gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) |
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S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) |
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S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
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S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
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S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
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.gpdup = (0x3f << 2) | (0x3f << 10),
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.gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 |
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S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 |
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S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 |
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S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
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S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
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S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
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.gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) |
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S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) |
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S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) |
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S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
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S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
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S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
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};
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static struct platform_device *jive_devices[] __initdata = {
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&s3c_device_usb,
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&s3c_device_rtc,
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&s3c_device_wdt,
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&s3c_device_i2c,
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&s3c_device_lcd,
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&s3c_device_nand,
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&s3c_device_usbgadget,
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};
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@ -419,6 +510,7 @@ static void __init jive_machine_init(void)
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S3C2410_MISCCR_USBSUSPND1, 0x0);
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s3c24xx_udc_set_platdata(&jive_udc_cfg);
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s3c24xx_fb_set_platdata(&jive_lcd_config);
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platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
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}
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