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[TG3]: Improve ASF heartbeat.

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Change to a different ASF heartbeat message code to improve
reliability.

There were some reports of unintended resets on real time kernels
where the timer may be slow and cause the heartbeat to be late.
Netpoll will also have the same problem because the timer irq will
be unavailable.

Using the new heartbeat code, the ASF firmware will also check the
ring condition before resetting the chip when the heartbeat is
expiring.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan 2006-09-27 16:00:40 -07:00 committed by David S. Miller
parent 3d3ebe741b
commit 130b8e4d0e
2 changed files with 19 additions and 2 deletions
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20
drivers/net/tg3.c
View File

@ -6690,13 +6690,29 @@ static void tg3_timer(unsigned long __opaque)
tp->timer_counter = tp->timer_multiplier; tp->timer_counter = tp->timer_multiplier;
} }
/* Heartbeat is only sent once every 2 seconds. */ /* Heartbeat is only sent once every 2 seconds.
*
* The heartbeat is to tell the ASF firmware that the host
* driver is still alive. In the event that the OS crashes,
* ASF needs to reset the hardware to free up the FIFO space
* that may be filled with rx packets destined for the host.
* If the FIFO is full, ASF will no longer function properly.
*
* Unintended resets have been reported on real time kernels
* where the timer doesn't run on time. Netpoll will also have
* same problem.
*
* The new FWCMD_NICDRV_ALIVE3 command tells the ASF firmware
* to check the ring condition when the heartbeat is expiring
* before doing the reset. This will prevent most unintended
* resets.
*/
if (!--tp->asf_counter) { if (!--tp->asf_counter) {
if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) { if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
u32 val; u32 val;
tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX,
FWCMD_NICDRV_ALIVE2); FWCMD_NICDRV_ALIVE3);
tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4); tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
/* 5 seconds timeout */ /* 5 seconds timeout */
tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5); tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);

1
drivers/net/tg3.h
View File

@ -1537,6 +1537,7 @@
#define FWCMD_NICDRV_FIX_DMAR 0x00000005 #define FWCMD_NICDRV_FIX_DMAR 0x00000005
#define FWCMD_NICDRV_FIX_DMAW 0x00000006 #define FWCMD_NICDRV_FIX_DMAW 0x00000006
#define FWCMD_NICDRV_ALIVE2 0x0000000d #define FWCMD_NICDRV_ALIVE2 0x0000000d
#define FWCMD_NICDRV_ALIVE3 0x0000000e
#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c #define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c
#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 #define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80
#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 #define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00