SCSI fixes on 20171205
We have a bunch of fixes for aacraid, a set of coherency fixes that only affect non-coherent platforms and one coccinelle detected null check after use. Signed-off-by: James E.J. Bottomley <jejb@linux.vnet.ibm.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJaJs8oAAoJEAVr7HOZEZN4MhkQAJZ/KfYI4CTrX45NAV3AlOT1 CW39vYT3ODjsw97uJkoJjbXKIqHemObP2JlcIjhdffd/Vrk1Yn88KclUktSjwhBV X5wGprktrmCKKcL1iobSv5o2r/2TZpeMHBIgdC1LogCw7L5eCBibnx8GiU+OkXJM 2aGw8GPS+hySilTde20aL6OumQfLFuZzk8TeZ5bAAjyIgIJqw/1pyn+2Hy5EnyW7 n5RpC8qG+cNLXHHYaITHX666lSRM+DMdRGVNLxK9dzdQkaFpu7w598/aeM0zRJuS IqAVlLowY+pt3C14ax9jxvGiZ96kuYClWBeWuw4oHGfLxNqNU2xd38xzJTkUoRX7 0F16+froi85DV8UWbDswakOfs0vAoW1kLES3nnwrZ6inQ9yHANEBrXY4jZ3HwcEy ax81fYMrpd8kD9lI0mGiX5qoanfv08jTn5UfFYNddYFcCrKRymDCVZDw6p/9JFxV Tkry526TxELziqsfKNHt2yFKKDJ8CjtQqFSUyeo/pBCo7X87aV5B3oFgtb4lxseb yT7o+mo452jNuL8veMPe6vz21uTwbfQfof1wk4wV8bRydGwu7ofOdeILLgtQIieM yb+8f/XGpg1Q+Y3pTfO46a/d76KxhEHVsgqQLwMQB7p+C9PZh5Fc3VdSyjmUFyEN Dc6i3IbfiZVgKm9Tsouf =boPv -----END PGP SIGNATURE----- Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "A bunch of fixes for aacraid, a set of coherency fixes that only affect non-coherent platforms and one coccinelle detected null check after use" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: libsas: align sata_device's rps_resp on a cacheline scsi: use dma_get_cache_alignment() as minimum DMA alignment scsi: dma-mapping: always provide dma_get_cache_alignment scsi: ufs: ufshcd: fix potential NULL pointer dereference in ufshcd_config_vreg scsi: aacraid: Prevent crash in case of free interrupt during scsi EH path scsi: aacraid: Perform initialization reset only once scsi: aacraid: Check for PCI state of device in a generic way
This commit is contained in:
commit
13231cacce
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@ -1673,6 +1673,7 @@ struct aac_dev
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struct aac_hba_map_info hba_map[AAC_MAX_BUSES][AAC_MAX_TARGETS];
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u8 adapter_shutdown;
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u32 handle_pci_error;
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bool init_reset;
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};
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#define aac_adapter_interrupt(dev) \
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@ -467,35 +467,6 @@ int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw
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return 0;
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}
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#ifdef CONFIG_EEH
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static inline int aac_check_eeh_failure(struct aac_dev *dev)
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{
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/* Check for an EEH failure for the given
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* device node. Function eeh_dev_check_failure()
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* returns 0 if there has not been an EEH error
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* otherwise returns a non-zero value.
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*
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* Need to be called before any PCI operation,
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* i.e.,before aac_adapter_check_health()
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*/
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struct eeh_dev *edev = pci_dev_to_eeh_dev(dev->pdev);
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if (eeh_dev_check_failure(edev)) {
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/* The EEH mechanisms will handle this
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* error and reset the device if
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* necessary.
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*/
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return 1;
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}
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return 0;
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}
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#else
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static inline int aac_check_eeh_failure(struct aac_dev *dev)
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{
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return 0;
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}
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#endif
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/*
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* Define the highest level of host to adapter communication routines.
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* These routines will support host to adapter FS commuication. These
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@ -701,7 +672,7 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
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return -ETIMEDOUT;
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}
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if (aac_check_eeh_failure(dev))
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if (unlikely(pci_channel_offline(dev->pdev)))
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return -EFAULT;
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if ((blink = aac_adapter_check_health(dev)) > 0) {
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@ -801,7 +772,7 @@ int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback,
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spin_unlock_irqrestore(&fibptr->event_lock, flags);
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if (aac_check_eeh_failure(dev))
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if (unlikely(pci_channel_offline(dev->pdev)))
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return -EFAULT;
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fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
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@ -1583,6 +1554,7 @@ static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
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* will ensure that i/o is queisced and the card is flushed in that
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* case.
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*/
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aac_free_irq(aac);
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aac_fib_map_free(aac);
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dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr,
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aac->comm_phys);
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@ -1590,7 +1562,6 @@ static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
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aac->comm_phys = 0;
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kfree(aac->queues);
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aac->queues = NULL;
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aac_free_irq(aac);
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kfree(aac->fsa_dev);
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aac->fsa_dev = NULL;
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@ -1680,6 +1680,9 @@ static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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aac->cardtype = index;
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INIT_LIST_HEAD(&aac->entry);
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if (aac_reset_devices || reset_devices)
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aac->init_reset = true;
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aac->fibs = kzalloc(sizeof(struct fib) * (shost->can_queue + AAC_NUM_MGT_FIB), GFP_KERNEL);
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if (!aac->fibs)
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goto out_free_host;
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@ -561,11 +561,16 @@ int _aac_rx_init(struct aac_dev *dev)
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dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
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dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt;
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dev->OIMR = status = rx_readb (dev, MUnit.OIMR);
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if ((((status & 0x0c) != 0x0c) || aac_reset_devices || reset_devices) &&
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!aac_rx_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
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/* Make sure the Hardware FIFO is empty */
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while ((++restart < 512) &&
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(rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL));
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if (((status & 0x0c) != 0x0c) || dev->init_reset) {
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dev->init_reset = false;
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if (!aac_rx_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) {
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/* Make sure the Hardware FIFO is empty */
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while ((++restart < 512) &&
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(rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL));
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}
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}
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/*
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* Check to see if the board panic'd while booting.
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*/
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@ -868,9 +868,13 @@ int aac_src_init(struct aac_dev *dev)
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/* Failure to reset here is an option ... */
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dev->a_ops.adapter_sync_cmd = src_sync_cmd;
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dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
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if ((aac_reset_devices || reset_devices) &&
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!aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
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++restart;
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if (dev->init_reset) {
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dev->init_reset = false;
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if (!aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
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++restart;
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}
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/*
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* Check to see if the board panic'd while booting.
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*/
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@ -1014,9 +1018,13 @@ int aac_srcv_init(struct aac_dev *dev)
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/* Failure to reset here is an option ... */
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dev->a_ops.adapter_sync_cmd = src_sync_cmd;
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dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
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if ((aac_reset_devices || reset_devices) &&
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!aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
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++restart;
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if (dev->init_reset) {
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dev->init_reset = false;
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if (!aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
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++restart;
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}
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/*
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* Check to see if flash update is running.
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* Wait for the adapter to be up and running. Wait up to 5 minutes
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@ -2148,11 +2148,13 @@ void __scsi_init_queue(struct Scsi_Host *shost, struct request_queue *q)
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q->limits.cluster = 0;
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/*
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* set a reasonable default alignment on word boundaries: the
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* host and device may alter it using
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* blk_queue_update_dma_alignment() later.
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* Set a reasonable default alignment: The larger of 32-byte (dword),
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* which is a common minimum for HBAs, and the minimum DMA alignment,
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* which is set by the platform.
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*
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* Devices that require a bigger alignment can increase it later.
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*/
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blk_queue_dma_alignment(q, 0x03);
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blk_queue_dma_alignment(q, max(4, dma_get_cache_alignment()) - 1);
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}
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EXPORT_SYMBOL_GPL(__scsi_init_queue);
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@ -6559,12 +6559,15 @@ static int ufshcd_config_vreg(struct device *dev,
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struct ufs_vreg *vreg, bool on)
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{
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int ret = 0;
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struct regulator *reg = vreg->reg;
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const char *name = vreg->name;
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struct regulator *reg;
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const char *name;
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int min_uV, uA_load;
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BUG_ON(!vreg);
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reg = vreg->reg;
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name = vreg->name;
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if (regulator_count_voltages(reg) > 0) {
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min_uV = on ? vreg->min_uV : 0;
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ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
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@ -704,7 +704,6 @@ static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
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return ret;
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}
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#ifdef CONFIG_HAS_DMA
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static inline int dma_get_cache_alignment(void)
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{
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#ifdef ARCH_DMA_MINALIGN
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#endif
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return 1;
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}
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#endif
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/* flags for the coherent memory api */
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#define DMA_MEMORY_EXCLUSIVE 0x01
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@ -159,11 +159,11 @@ struct expander_device {
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struct sata_device {
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unsigned int class;
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struct smp_resp rps_resp; /* report_phy_sata_resp */
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u8 port_no; /* port number, if this is a PM (Port) */
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struct ata_port *ap;
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struct ata_host ata_host;
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struct smp_resp rps_resp ____cacheline_aligned; /* report_phy_sata_resp */
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u8 fis[ATA_RESP_FIS_SIZE];
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};
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