ARM: pm: omap34xx: remove get_*_restore_pointer functions, directly use entry points
Upon return from off-mode, the ROM code jumps to a restore function saved in the scratchpad. Based on SoC revision or errata, this restore entry point is different. Current code uses some helper functions in sleep34xx.S (get_*_restore_pointer) to get the restore function entry point. When returning from off-mode, this code is executed from SDRAM, so there's no reason to use these helper functions when using the SDRAM entry points directly would work just fine. This patch uses ENTRY/ENDPROC to create "real" entry points for these functions, and uses those values directly when writing the scratchpad. Tested all three entry points - restore_es3: 3430/n900 - restore_3630: 3630/Zoom3 - restore: 3530/Overo Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -286,14 +286,15 @@ void omap3_save_scratchpad_contents(void)
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scratchpad_contents.boot_config_ptr = 0x0;
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if (cpu_is_omap3630())
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scratchpad_contents.public_restore_ptr =
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virt_to_phys(get_omap3630_restore_pointer());
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virt_to_phys(omap3_restore_3630);
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else if (omap_rev() != OMAP3430_REV_ES3_0 &&
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omap_rev() != OMAP3430_REV_ES3_1)
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scratchpad_contents.public_restore_ptr =
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virt_to_phys(get_restore_pointer());
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virt_to_phys(omap3_restore);
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else
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scratchpad_contents.public_restore_ptr =
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virt_to_phys(get_es3_restore_pointer());
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virt_to_phys(omap3_restore_es3);
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if (omap_type() == OMAP2_DEVICE_TYPE_GP)
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scratchpad_contents.secure_ram_restore_ptr = 0x0;
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else
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@ -386,9 +386,9 @@ extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
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extern void omap3_save_scratchpad_contents(void);
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extern void omap3_clear_scratchpad_contents(void);
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extern u32 *get_restore_pointer(void);
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extern u32 *get_es3_restore_pointer(void);
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extern u32 *get_omap3630_restore_pointer(void);
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extern void omap3_restore(void);
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extern void omap3_restore_es3(void);
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extern void omap3_restore_3630(void);
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extern u32 omap3_arm_context[128];
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extern void omap3_control_save_context(void);
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extern void omap3_control_restore_context(void);
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@ -74,46 +74,6 @@
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* API functions
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*/
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/*
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* The "get_*restore_pointer" functions are used to provide a
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* physical restore address where the ROM code jumps while waking
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* up from MPU OFF/OSWR state.
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* The restore pointer is stored into the scratchpad.
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*/
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.text
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/* Function call to get the restore pointer for resume from OFF */
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ENTRY(get_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_restore_pointer)
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.align
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ENTRY(get_restore_pointer_sz)
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.word . - get_restore_pointer
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.text
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/* Function call to get the restore pointer for 3630 resume from OFF */
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ENTRY(get_omap3630_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_3630
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_omap3630_restore_pointer)
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.align
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ENTRY(get_omap3630_restore_pointer_sz)
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.word . - get_omap3630_restore_pointer
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.text
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/* Function call to get the restore pointer for ES3 to resume from OFF */
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ENTRY(get_es3_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_es3
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_es3_restore_pointer)
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.align
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ENTRY(get_es3_restore_pointer_sz)
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.word . - get_es3_restore_pointer
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.text
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/*
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* L2 cache needs to be toggled for stable OFF mode functionality on 3630.
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@ -316,12 +276,12 @@ omap3_do_wfi:
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* restore_3630: applies to 36xx
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* restore: common code for 3xxx
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*/
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restore_es3:
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ENTRY(omap3_restore_es3)
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ldr r5, pm_prepwstst_core_p
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ldr r4, [r5]
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and r4, r4, #0x3
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cmp r4, #0x0 @ Check if previous power state of CORE is OFF
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bne restore
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bne omap3_restore
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adr r0, es3_sdrc_fix
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ldr r1, sram_base
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ldr r2, es3_sdrc_fix_sz
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@ -333,22 +293,24 @@ copy_to_sram:
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bne copy_to_sram
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ldr r1, sram_base
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blx r1
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b restore
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b omap3_restore
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ENDPROC(omap3_restore_es3)
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restore_3630:
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ENTRY(omap3_restore_3630)
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ldr r1, pm_prepwstst_core_p
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ldr r2, [r1]
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and r2, r2, #0x3
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cmp r2, #0x0 @ Check if previous power state of CORE is OFF
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bne restore
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bne omap3_restore
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/* Disable RTA before giving control */
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ldr r1, control_mem_rta
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mov r2, #OMAP36XX_RTA_DISABLE
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str r2, [r1]
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ENDPROC(omap3_restore_3630)
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/* Fall through to common code for the remaining logic */
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restore:
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ENTRY(omap3_restore)
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/*
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* Read the pwstctrl register to check the reason for mpu reset.
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* This tells us what was lost.
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@ -438,6 +400,7 @@ skipl2reen:
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/* Now branch to the common CPU resume function */
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b cpu_resume
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ENDPROC(omap3_restore)
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.ltorg
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