powerpc/85xx: Move mpc8536ds.dts to address-cells/size-cells = <2>
Change the top-level #address-cells and #size-cells to <2> so the mpc8536ds.dts is easier to deal with both a true 32-bit physical or 36-bit physical address space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -14,8 +14,8 @@
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/ {
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model = "fsl,mpc8536ds";
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compatible = "fsl,mpc8536ds";
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#address-cells = <1>;
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#size-cells = <1>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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ethernet0 = &enet0;
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@ -42,7 +42,7 @@ PowerPC,8536@0 {
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memory {
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device_type = "memory";
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reg = <00000000 00000000>; // Filled by U-Boot
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reg = <0 0 0 0>; // Filled by U-Boot
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};
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soc@ffe00000 {
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@ -50,7 +50,7 @@ soc@ffe00000 {
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0x0 0xffe00000 0x100000>;
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ranges = <0x0 0 0xffe00000 0x100000>;
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bus-frequency = <0>; // Filled out by uboot.
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ecm-law@0 {
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@ -347,13 +347,13 @@ pci0: pci@ffe08000 {
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interrupt-parent = <&mpic>;
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interrupts = <24 0x2>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
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0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
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ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
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0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe08000 0x1000>;
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reg = <0 0xffe08000 0 0x1000>;
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};
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pci1: pcie@ffe09000 {
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@ -362,10 +362,10 @@ pci1: pcie@ffe09000 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe09000 0x1000>;
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reg = <0 0xffe09000 0 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
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0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
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ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
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0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <25 0x2>;
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@ -398,10 +398,10 @@ pci2: pcie@ffe0a000 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe0a000 0x1000>;
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reg = <0 0xffe0a000 0 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
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0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
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ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
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0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 0x2>;
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@ -434,10 +434,10 @@ pci3: pcie@ffe0b000 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe0b000 0x1000>;
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reg = <0 0xffe0b000 0 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
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0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
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ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
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0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <27 0x2>;
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