MIPS: eBPF: Remove REG_32BIT_ZERO_EX
REG_32BIT_ZERO_EX and REG_64BIT are always handled in exactly the same way, and reg_val_propagate_range() never actually sets any register to type REG_32BIT_ZERO_EX. Remove the redundant & unused REG_32BIT_ZERO_EX. Signed-off-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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13443154f6
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1910faebf6
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@ -79,8 +79,6 @@ enum reg_val_type {
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REG_64BIT_32BIT,
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/* 32-bit compatible, need truncation for 64-bit ops. */
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REG_32BIT,
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/* 32-bit zero extended. */
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REG_32BIT_ZERO_EX,
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/* 32-bit no sign/zero extension needed. */
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REG_32BIT_POS
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};
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@ -349,7 +347,7 @@ static int build_int_epilogue(struct jit_ctx *ctx, int dest_reg)
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if (dest_reg == MIPS_R_RA) {
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/* Don't let zero extended value escape. */
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td = get_reg_val_type(ctx, prog->len, BPF_REG_0);
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if (td == REG_64BIT || td == REG_32BIT_ZERO_EX)
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if (td == REG_64BIT)
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emit_instr(ctx, sll, r0, r0, 0);
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}
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@ -695,7 +693,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (dst < 0)
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return dst;
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td = get_reg_val_type(ctx, this_idx, insn->dst_reg);
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if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) {
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if (td == REG_64BIT) {
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/* sign extend */
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emit_instr(ctx, sll, dst, dst, 0);
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}
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@ -710,7 +708,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (dst < 0)
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return dst;
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td = get_reg_val_type(ctx, this_idx, insn->dst_reg);
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if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) {
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if (td == REG_64BIT) {
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/* sign extend */
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emit_instr(ctx, sll, dst, dst, 0);
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}
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@ -724,7 +722,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (dst < 0)
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return dst;
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td = get_reg_val_type(ctx, this_idx, insn->dst_reg);
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if (td == REG_64BIT || td == REG_32BIT_ZERO_EX)
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if (td == REG_64BIT)
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/* sign extend */
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emit_instr(ctx, sll, dst, dst, 0);
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if (insn->imm == 1) {
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@ -863,13 +861,13 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (src < 0 || dst < 0)
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return -EINVAL;
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td = get_reg_val_type(ctx, this_idx, insn->dst_reg);
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if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) {
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if (td == REG_64BIT) {
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/* sign extend */
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emit_instr(ctx, sll, dst, dst, 0);
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}
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did_move = false;
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ts = get_reg_val_type(ctx, this_idx, insn->src_reg);
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if (ts == REG_64BIT || ts == REG_32BIT_ZERO_EX) {
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if (ts == REG_64BIT) {
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int tmp_reg = MIPS_R_AT;
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if (bpf_op == BPF_MOV) {
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@ -1257,8 +1255,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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if (insn->imm == 64 && td == REG_32BIT)
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emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);
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if (insn->imm != 64 &&
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(td == REG_64BIT || td == REG_32BIT_ZERO_EX)) {
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if (insn->imm != 64 && td == REG_64BIT) {
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/* sign extend */
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emit_instr(ctx, sll, dst, dst, 0);
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}
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