atmel-mci: Integrate AT91 specific definition in header file
The MCI IP is shared among AVR32 and AT91 SOCs. AT91 has specific bit definitions in the user interface of MCI SD/MMC IP. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
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@ -7,6 +7,11 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors
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*/
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#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
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#define __DRIVERS_MMC_ATMEL_MCI_H__
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@ -14,11 +19,17 @@
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#define MCI_CR 0x0000 /* Control */
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# define MCI_CR_MCIEN ( 1 << 0) /* MCI Enable */
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# define MCI_CR_MCIDIS ( 1 << 1) /* MCI Disable */
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# define MCI_CR_PWSEN ( 1 << 2) /* Power Save Enable */
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# define MCI_CR_PWSDIS ( 1 << 3) /* Power Save Disable */
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# define MCI_CR_SWRST ( 1 << 7) /* Software Reset */
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#define MCI_MR 0x0004 /* Mode */
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# define MCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */
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# define MCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */
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# define MCI_MR_RDPROOF ( 1 << 11) /* Read Proof */
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# define MCI_MR_WRPROOF ( 1 << 12) /* Write Proof */
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# define MCI_MR_PDCFBYTE ( 1 << 13) /* Force Byte Transfer */
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# define MCI_MR_PDCPADV ( 1 << 14) /* Padding Value */
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# define MCI_MR_PDCMODE ( 1 << 15) /* PDC-oriented Mode */
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#define MCI_DTOR 0x0008 /* Data Timeout */
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# define MCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */
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# define MCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */
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