[SPARC64]: Remove ktlb.S instruction patching.
This was kind of ugly, and actually buggy. The bug was that we didn't handle a machine with memory starting > 4GB. If the 'prompmd' was allocated in physical memory > 4GB we'd croak because the obp_iaddr_patch and obp_daddr_patch things only supported a 32-bit physical address. So fix this by just loading the appropriate values from two variables in the kernel image, which is locked into the TLB and thus accesses to them can't cause a recursive TLB miss. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -15,8 +15,6 @@
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.text
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.align 32
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.globl sparc64_vpte_patchme1
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.globl sparc64_vpte_patchme2
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/*
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* On a second level vpte miss, check whether the original fault is to the OBP
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* range (note that this is only possible for instruction miss, data misses to
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@ -33,18 +31,17 @@ sparc64_vpte_nucleus:
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*/
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sethi %hi(LOW_OBP_ADDRESS), %g5
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cmp %g4, %g5
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blu,pn %xcc, sparc64_vpte_patchme1
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blu,pn %xcc, kern_vpte
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mov 0x1, %g5
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sllx %g5, 32, %g5
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cmp %g4, %g5
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blu,pn %xcc, obp_iaddr_patch
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blu,pn %xcc, vpte_insn_obp
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nop
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/* These two instructions are patched by paginig_init(). */
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sparc64_vpte_patchme1:
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sethi %hi(0), %g5
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sparc64_vpte_patchme2:
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or %g5, %lo(0), %g5
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kern_vpte:
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sethi %hi(swapper_pgd_zero), %g5
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lduw [%g5 + %lo(swapper_pgd_zero)], %g5
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/* With kernel PGD in %g5, branch back into dtlb_backend. */
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ba,pt %xcc, sparc64_kpte_continue
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@ -60,11 +57,9 @@ vpte_noent:
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stxa %g4, [%g1 + %g1] ASI_DMMU
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done
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.globl obp_iaddr_patch
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obp_iaddr_patch:
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/* These two instructions patched by inherit_prom_mappings(). */
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sethi %hi(0), %g5
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or %g5, %lo(0), %g5
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vpte_insn_obp:
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sethi %hi(prom_pmd_phys), %g5
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ldx [%g5 + %lo(prom_pmd_phys)], %g5
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/* Behave as if we are at TL0. */
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wrpr %g0, 1, %tl
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@ -100,11 +95,9 @@ obp_iaddr_patch:
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stxa %g5, [%g0] ASI_ITLB_DATA_IN
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retry
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.globl obp_daddr_patch
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obp_daddr_patch:
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/* These two instructions patched by inherit_prom_mappings(). */
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sethi %hi(0), %g5
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or %g5, %lo(0), %g5
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kvmap_do_obp:
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sethi %hi(prom_pmd_phys), %g5
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ldx [%g5 + %lo(prom_pmd_phys)], %g5
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/* Get PMD offset. */
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srlx %g4, 23, %g6
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@ -159,7 +152,7 @@ kvmap_check_obp:
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mov 0x1, %g5
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sllx %g5, 32, %g5
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cmp %g4, %g5
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blu,pn %xcc, obp_daddr_patch
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blu,pn %xcc, kvmap_do_obp
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nop
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kvmap_vmalloc_addr:
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@ -20,6 +20,7 @@
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/kprobes.h>
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#include <linux/cache.h>
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#include <asm/head.h>
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#include <asm/system.h>
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@ -45,10 +46,10 @@ struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
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unsigned long *sparc64_valid_addr_bitmap;
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/* Ugly, but necessary... -DaveM */
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unsigned long phys_base;
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unsigned long kern_base;
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unsigned long kern_size;
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unsigned long pfn_base;
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unsigned long phys_base __read_mostly;
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unsigned long kern_base __read_mostly;
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unsigned long kern_size __read_mostly;
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unsigned long pfn_base __read_mostly;
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/* This is even uglier. We have a problem where the kernel may not be
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* located at phys_base. However, initial __alloc_bootmem() calls need to
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@ -73,7 +74,7 @@ extern unsigned long sparc_ramdisk_image64;
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extern unsigned int sparc_ramdisk_image;
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extern unsigned int sparc_ramdisk_size;
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struct page *mem_map_zero;
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struct page *mem_map_zero __read_mostly;
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int bigkernel = 0;
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@ -318,6 +319,10 @@ extern void register_prom_callbacks(void);
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/* Exported for SMP bootup purposes. */
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unsigned long kern_locked_tte_data;
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/* Exported for kernel TLB miss handling in ktlb.S */
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unsigned long prom_pmd_phys __read_mostly;
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unsigned int swapper_pgd_zero __read_mostly;
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void __init early_pgtable_allocfail(char *type)
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{
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prom_printf("inherit_prom_mappings: Cannot alloc kernel %s.\n", type);
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@ -364,7 +369,6 @@ static void inherit_prom_mappings(void)
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pmd_t *pmdp;
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pte_t *ptep;
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int node, n, i, tsz;
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extern unsigned int obp_iaddr_patch[2], obp_daddr_patch[2];
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node = prom_finddevice("/virtual-memory");
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n = prom_getproplen(node, "translations");
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@ -434,13 +438,7 @@ static void inherit_prom_mappings(void)
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}
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}
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}
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phys_page = __pa(prompmd);
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obp_iaddr_patch[0] |= (phys_page >> 10);
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obp_iaddr_patch[1] |= (phys_page & 0x3ff);
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flushi((long)&obp_iaddr_patch[0]);
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obp_daddr_patch[0] |= (phys_page >> 10);
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obp_daddr_patch[1] |= (phys_page & 0x3ff);
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flushi((long)&obp_daddr_patch[0]);
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prom_pmd_phys = __pa(prompmd);
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/* Now fixup OBP's idea about where we really are mapped. */
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prom_printf("Remapping the kernel... ");
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@ -1407,8 +1405,6 @@ static unsigned long last_valid_pfn;
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void __init paging_init(void)
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{
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extern pmd_t swapper_pmd_dir[1024];
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extern unsigned int sparc64_vpte_patchme1[1];
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extern unsigned int sparc64_vpte_patchme2[1];
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unsigned long alias_base = kern_base + PAGE_OFFSET;
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unsigned long second_alias_page = 0;
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unsigned long pt, flags, end_pfn, pages_avail;
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@ -1502,11 +1498,7 @@ void __init paging_init(void)
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pud_set(pud_offset(&swapper_pg_dir[0], 0),
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swapper_pmd_dir + (shift / sizeof(pgd_t)));
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sparc64_vpte_patchme1[0] |=
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(((unsigned long)pgd_val(init_mm.pgd[0])) >> 10);
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sparc64_vpte_patchme2[0] |=
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(((unsigned long)pgd_val(init_mm.pgd[0])) & 0x3ff);
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flushi((long)&sparc64_vpte_patchme1[0]);
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swapper_pgd_zero = pgd_val(init_mm.pgd[0]);
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/* Setup bootmem... */
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pages_avail = 0;
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