KVM: VMX: Improve the method of writing vmcs control
Put cpu feature detecting part in hardware_setup, and stored the vmcs condition in global variable for further check. [glommer: fix for some i386-only machines not supporting CR8 load/store exiting] Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Yang, Sheng
Avi Kivity
parent
fb3f0f51d9
commit
1c3d14fe0a
@ -71,18 +71,17 @@ static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
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static struct page *vmx_io_bitmap_a;
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static struct page *vmx_io_bitmap_b;
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#ifdef CONFIG_X86_64
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#define HOST_IS_64 1
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#else
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#define HOST_IS_64 0
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#endif
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#define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
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static struct vmcs_descriptor {
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static struct vmcs_config {
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int size;
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int order;
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u32 revision_id;
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} vmcs_descriptor;
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u32 pin_based_exec_ctrl;
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u32 cpu_based_exec_ctrl;
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u32 vmexit_ctrl;
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u32 vmentry_ctrl;
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} vmcs_config;
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#define VMX_SEGMENT_FIELD(seg) \
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[VCPU_SREG_##seg] = { \
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@ -839,14 +838,93 @@ static void hardware_disable(void *garbage)
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asm volatile (ASM_VMX_VMXOFF : : : "cc");
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}
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static __init void setup_vmcs_descriptor(void)
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static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
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u32 msr, u32* result)
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{
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u32 vmx_msr_low, vmx_msr_high;
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u32 ctl = ctl_min | ctl_opt;
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rdmsr(msr, vmx_msr_low, vmx_msr_high);
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ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
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ctl |= vmx_msr_low; /* bit == 1 in low word ==> must be one */
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/* Ensure minimum (required) set of control bits are supported. */
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if (ctl_min & ~ctl)
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return -1;
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*result = ctl;
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return 0;
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}
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static __init int setup_vmcs_config(void)
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{
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u32 vmx_msr_low, vmx_msr_high;
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u32 min, opt;
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u32 _pin_based_exec_control = 0;
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u32 _cpu_based_exec_control = 0;
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u32 _vmexit_control = 0;
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u32 _vmentry_control = 0;
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min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
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opt = 0;
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if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
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&_pin_based_exec_control) < 0)
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return -1;
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min = CPU_BASED_HLT_EXITING |
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#ifdef CONFIG_X86_64
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CPU_BASED_CR8_LOAD_EXITING |
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CPU_BASED_CR8_STORE_EXITING |
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#endif
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CPU_BASED_USE_IO_BITMAPS |
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CPU_BASED_MOV_DR_EXITING |
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CPU_BASED_USE_TSC_OFFSETING;
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opt = 0;
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if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
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&_cpu_based_exec_control) < 0)
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return -1;
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min = 0;
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#ifdef CONFIG_X86_64
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min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
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#endif
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opt = 0;
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if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
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&_vmexit_control) < 0)
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return -1;
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min = opt = 0;
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if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
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&_vmentry_control) < 0)
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return -1;
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rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
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vmcs_descriptor.size = vmx_msr_high & 0x1fff;
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vmcs_descriptor.order = get_order(vmcs_descriptor.size);
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vmcs_descriptor.revision_id = vmx_msr_low;
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/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
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if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
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return -1;
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#ifdef CONFIG_X86_64
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/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
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if (vmx_msr_high & (1u<<16))
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return -1;
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#endif
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/* Require Write-Back (WB) memory type for VMCS accesses. */
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if (((vmx_msr_high >> 18) & 15) != 6)
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return -1;
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vmcs_config.size = vmx_msr_high & 0x1fff;
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vmcs_config.order = get_order(vmcs_config.size);
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vmcs_config.revision_id = vmx_msr_low;
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vmcs_config.pin_based_exec_ctrl = _pin_based_exec_control;
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vmcs_config.cpu_based_exec_ctrl = _cpu_based_exec_control;
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vmcs_config.vmexit_ctrl = _vmexit_control;
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vmcs_config.vmentry_ctrl = _vmentry_control;
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return 0;
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}
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static struct vmcs *alloc_vmcs_cpu(int cpu)
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@ -855,12 +933,12 @@ static struct vmcs *alloc_vmcs_cpu(int cpu)
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struct page *pages;
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struct vmcs *vmcs;
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pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
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pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
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if (!pages)
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return NULL;
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vmcs = page_address(pages);
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memset(vmcs, 0, vmcs_descriptor.size);
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vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
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memset(vmcs, 0, vmcs_config.size);
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vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
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return vmcs;
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}
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@ -871,7 +949,7 @@ static struct vmcs *alloc_vmcs(void)
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static void free_vmcs(struct vmcs *vmcs)
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{
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free_pages((unsigned long)vmcs, vmcs_descriptor.order);
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free_pages((unsigned long)vmcs, vmcs_config.order);
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}
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static void free_kvm_area(void)
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@ -904,7 +982,8 @@ static __init int alloc_kvm_area(void)
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static __init int hardware_setup(void)
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{
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setup_vmcs_descriptor();
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if (setup_vmcs_config() < 0)
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return -1;
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return alloc_kvm_area();
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}
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@ -1275,17 +1354,6 @@ static int init_rmode_tss(struct kvm* kvm)
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return 1;
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}
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static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
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{
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u32 msr_high, msr_low;
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rdmsr(msr, msr_low, msr_high);
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val &= msr_high;
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val |= msr_low;
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vmcs_write32(vmcs_field, val);
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}
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static void seg_setup(int seg)
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{
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struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
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@ -1382,20 +1450,10 @@ static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
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vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
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/* Control */
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vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
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PIN_BASED_VM_EXEC_CONTROL,
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PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
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| PIN_BASED_NMI_EXITING /* 20.6.1 */
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);
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vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
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CPU_BASED_VM_EXEC_CONTROL,
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CPU_BASED_HLT_EXITING /* 20.6.2 */
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| CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
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| CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
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| CPU_BASED_USE_IO_BITMAPS /* 20.6.2 */
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| CPU_BASED_MOV_DR_EXITING
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| CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
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);
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vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
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vmcs_config.pin_based_exec_ctrl);
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vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
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vmcs_config.cpu_based_exec_ctrl);
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vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
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vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
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@ -1459,12 +1517,11 @@ static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
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setup_msrs(vcpu);
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vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
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(HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
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vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
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/* 22.2.1, 20.8.1 */
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vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
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VM_ENTRY_CONTROLS, 0);
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vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
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vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
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#ifdef CONFIG_X86_64
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