powerpc/spufs: remove class_0_dsisr from spu exception handling
According to the CBEA, the SPU dsisr is not updated for class 0 exceptions. spu_stopped() is testing the dsisr that was passed to it from the class 0 exception handler, so we return a false positive here. This patch cleans up the interrupt handler and erroneous tests in spu_stopped. It also removes the fields from the csa since it is not needed to process class 0 events. Signed-off-by: Luke Browning <lukebrowning@us.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
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@ -324,14 +324,12 @@ spu_irq_class_0(int irq, void *data)
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stat = spu_int_stat_get(spu, 0) & mask;
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stat = spu_int_stat_get(spu, 0) & mask;
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spu->class_0_pending |= stat;
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spu->class_0_pending |= stat;
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spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
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spu->class_0_dar = spu_mfc_dar_get(spu);
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spu->class_0_dar = spu_mfc_dar_get(spu);
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spin_unlock(&spu->register_lock);
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spin_unlock(&spu->register_lock);
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spu->stop_callback(spu, 0);
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spu->stop_callback(spu, 0);
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spu->class_0_pending = 0;
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spu->class_0_pending = 0;
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spu->class_0_dsisr = 0;
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spu->class_0_dar = 0;
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spu->class_0_dar = 0;
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spu_int_stat_clear(spu, 0, stat);
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spu_int_stat_clear(spu, 0, stat);
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@ -27,7 +27,6 @@ void spufs_stop_callback(struct spu *spu, int irq)
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switch(irq) {
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switch(irq) {
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case 0 :
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case 0 :
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ctx->csa.class_0_pending = spu->class_0_pending;
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ctx->csa.class_0_pending = spu->class_0_pending;
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ctx->csa.class_0_dsisr = spu->class_0_dsisr;
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ctx->csa.class_0_dar = spu->class_0_dar;
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ctx->csa.class_0_dar = spu->class_0_dar;
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break;
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break;
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case 1 :
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case 1 :
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@ -69,10 +68,6 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
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if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
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if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
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return 1;
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return 1;
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dsisr = ctx->csa.class_0_dsisr;
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if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
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return 1;
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dsisr = ctx->csa.class_1_dsisr;
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dsisr = ctx->csa.class_1_dsisr;
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if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
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if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
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return 1;
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return 1;
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@ -2844,7 +2844,6 @@ static void dump_spu_fields(struct spu *spu)
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DUMP_FIELD(spu, "0x%lx", flags);
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DUMP_FIELD(spu, "0x%lx", flags);
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DUMP_FIELD(spu, "%d", class_0_pending);
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DUMP_FIELD(spu, "%d", class_0_pending);
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DUMP_FIELD(spu, "0x%lx", class_0_dar);
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DUMP_FIELD(spu, "0x%lx", class_0_dar);
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DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
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DUMP_FIELD(spu, "0x%lx", class_1_dar);
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DUMP_FIELD(spu, "0x%lx", class_1_dar);
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DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
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DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
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DUMP_FIELD(spu, "0x%lx", irqs[0]);
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DUMP_FIELD(spu, "0x%lx", irqs[0]);
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@ -131,7 +131,6 @@ struct spu {
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u64 flags;
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u64 flags;
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u64 class_0_pending;
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u64 class_0_pending;
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u64 class_0_dar;
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u64 class_0_dar;
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u64 class_0_dsisr;
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u64 class_1_dar;
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u64 class_1_dar;
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u64 class_1_dsisr;
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u64 class_1_dsisr;
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size_t ls_size;
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size_t ls_size;
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@ -254,7 +254,7 @@ struct spu_state {
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u64 spu_chnldata_RW[32];
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u64 spu_chnldata_RW[32];
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u32 spu_mailbox_data[4];
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u32 spu_mailbox_data[4];
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u32 pu_mailbox_data[1];
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u32 pu_mailbox_data[1];
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u64 class_0_dar, class_0_dsisr, class_0_pending;
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u64 class_0_dar, class_0_pending;
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u64 class_1_dar, class_1_dsisr;
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u64 class_1_dar, class_1_dsisr;
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unsigned long suspend_time;
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unsigned long suspend_time;
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spinlock_t register_lock;
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spinlock_t register_lock;
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