luck/tmp_suning_uos_patched
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

r8169: make room for more specific 8168 hardware start procedure

Browse Source 
Broadly speaking the 8168c* share some common code which will
be factored in __rtl_hw_start_8168cp. The 8168b* share some
code too but it will be a bit different.

Any change of behavior should be confined to the currently
unidentified 8168 chipsets. They will not be applied the Tx
performance tweak and will emit a warning instead.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
This commit is contained in:
Francois Romieu 2008-06-28 11:58:39 +02:00
parent b836390159
commit 219a1e9d46
1 changed files with 61 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

66
drivers/net/r8169.c
View File

@ -1387,7 +1387,7 @@ static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
static void rtl8168c_1_hw_phy_config(void __iomem *ioaddr)
{
struct phy_reg phy_reg_init[] = {
{ 0x1f, 0x0001 },
@ -1416,7 +1416,7 @@ static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
mdio_write(ioaddr, 0x1f, 0x0000);
}
static void rtl8168cx_hw_phy_config(void __iomem *ioaddr)
static void rtl8168c_2_hw_phy_config(void __iomem *ioaddr)
{
struct phy_reg phy_reg_init[] = {
{ 0x1f, 0x0001 },
@ -1495,10 +1495,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
rtl8168cp_hw_phy_config(ioaddr);
break;
case RTL_GIGA_MAC_VER_19:
rtl8168c_hw_phy_config(ioaddr);
rtl8168c_1_hw_phy_config(ioaddr);
break;
case RTL_GIGA_MAC_VER_20:
rtl8168cx_hw_phy_config(ioaddr);
rtl8168c_2_hw_phy_config(ioaddr);
break;
default:
break;
@ -2384,6 +2384,36 @@ static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len)
}
}
static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
{
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
}
static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
{
rtl_hw_start_8168bb(ioaddr, pdev);
}
static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
{
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
}
static void rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
{
__rtl_hw_start_8168cp(ioaddr, pdev);
}
static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
{
__rtl_hw_start_8168cp(ioaddr, pdev);
}
static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
{
__rtl_hw_start_8168cp(ioaddr, pdev);
}
static void rtl_hw_start_8168(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
@ -2417,7 +2447,33 @@ static void rtl_hw_start_8168(struct net_device *dev)
RTL_R8(IntrMask);
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_11:
rtl_hw_start_8168bb(ioaddr, pdev);
break;
case RTL_GIGA_MAC_VER_12:
case RTL_GIGA_MAC_VER_17:
rtl_hw_start_8168bef(ioaddr, pdev);
break;
case RTL_GIGA_MAC_VER_18:
rtl_hw_start_8168cp(ioaddr, pdev);
break;
case RTL_GIGA_MAC_VER_19:
rtl_hw_start_8168c_1(ioaddr, pdev);
break;
case RTL_GIGA_MAC_VER_20:
rtl_hw_start_8168c_2(ioaddr, pdev);
break;
default:
printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
dev->name, tp->mac_version);
break;
}
RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);