arm64: lib: improve copy_page to deal with 128 bytes at a time
We want to avoid lots of different copy_page implementations, settling for something that is "good enough" everywhere and hopefully easy to understand and maintain whilst we're at it. This patch reworks our copy_page implementation based on discussions with Cavium on the list and benchmarking on Cortex-A processors so that: - The loop is unrolled to copy 128 bytes per iteration - The reads are offset so that we read from the next 128-byte block in the same iteration that we store the previous block - Explicit prefetch instructions are removed for now, since they hurt performance on CPUs with hardware prefetching - The loop exit condition is calculated at the start of the loop Signed-off-by: Will Deacon <will.deacon@arm.com> Tested-by: Andrew Pinski <apinski@cavium.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -27,20 +27,50 @@
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* x1 - src
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*/
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ENTRY(copy_page)
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/* Assume cache line size is 64 bytes. */
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prfm pldl1strm, [x1, #64]
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1: ldp x2, x3, [x1]
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ldp x2, x3, [x1]
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ldp x4, x5, [x1, #16]
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ldp x6, x7, [x1, #32]
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ldp x8, x9, [x1, #48]
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add x1, x1, #64
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prfm pldl1strm, [x1, #64]
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ldp x10, x11, [x1, #64]
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ldp x12, x13, [x1, #80]
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ldp x14, x15, [x1, #96]
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ldp x16, x17, [x1, #112]
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mov x18, #(PAGE_SIZE - 128)
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add x1, x1, #128
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1:
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subs x18, x18, #128
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stnp x2, x3, [x0]
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ldp x2, x3, [x1]
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stnp x4, x5, [x0, #16]
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ldp x4, x5, [x1, #16]
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stnp x6, x7, [x0, #32]
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ldp x6, x7, [x1, #32]
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stnp x8, x9, [x0, #48]
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ldp x8, x9, [x1, #48]
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stnp x10, x11, [x0, #64]
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ldp x10, x11, [x1, #64]
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stnp x12, x13, [x0, #80]
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ldp x12, x13, [x1, #80]
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stnp x14, x15, [x0, #96]
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ldp x14, x15, [x1, #96]
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stnp x16, x17, [x0, #112]
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ldp x16, x17, [x1, #112]
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add x0, x0, #128
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add x1, x1, #128
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b.gt 1b
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stnp x2, x3, [x0]
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stnp x4, x5, [x0, #16]
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stnp x6, x7, [x0, #32]
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stnp x8, x9, [x0, #48]
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add x0, x0, #64
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tst x1, #(PAGE_SIZE - 1)
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b.ne 1b
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stnp x10, x11, [x0, #64]
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stnp x12, x13, [x0, #80]
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stnp x14, x15, [x0, #96]
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stnp x16, x17, [x0, #112]
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ret
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ENDPROC(copy_page)
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