luck/tmp_suning_uos_patched
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Microblaze patches for 3.16-rc1

Browse Source 
- Clean PCI and DMA handling
 - Use generic device.h
 - Some cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iEYEABECAAYFAlOQT0MACgkQykllyylKDCF7mwCbBso3EMWGPPkpMiieYiy6pVze
 AYYAoJ4xyXwVZC+bNf6Bf3ojU7QXPQc1
 =qXNT
 -----END PGP SIGNATURE-----

Merge tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze into next

Pull Microblaze updates from Michal Simek:
 - cleanup PCI and DMA handling
 - use generic device.h
 - some cleanups

* tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: Fix typo in head.S s/substract/subtract/
  microblaze: remove check for CONFIG_XILINX_CONSOLE
  microblaze: Use generic device.h
  microblaze: Do not setup empty unmap_sg function
  microblaze: Remove device_to_mask
  microblaze: Clean device dma_ops structure
  microblaze: Cleanup PCI_DRAM_OFFSET handling
  microblaze: Do not setup pci_dma_ops
  microblaze: Return default dma operations
  microblaze: Enable SERIAL_OF_PLATFORM
This commit is contained in:
Linus Torvalds 2014-06-05 16:15:33 -07:00
commit 2b03adc191
12 changed files with 9 additions and 144 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/microblaze/configs/mmu_defconfig
View File

@ -49,6 +49,7 @@ CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_XILINX_HWICAP=y
CONFIG_I2C=y

1
arch/microblaze/configs/nommu_defconfig
View File

@ -58,6 +58,7 @@ CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_XILINX_HWICAP=y
CONFIG_I2C=y

1
arch/microblaze/include/asm/Kbuild
View File

@ -2,6 +2,7 @@
generic-y += barrier.h
generic-y += clkdev.h
generic-y += cputime.h
generic-y += device.h
generic-y += exec.h
generic-y += hash.h
generic-y += mcs_spinlock.h

26
arch/microblaze/include/asm/device.h
View File

@ -1,26 +0,0 @@
/*
* Arch specific extensions to struct device
*
* This file is subject to the terms and conditions of the GNU General Public
* License v2. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef _ASM_MICROBLAZE_DEVICE_H
#define _ASM_MICROBLAZE_DEVICE_H
struct device_node;
struct dev_archdata {
/* DMA operations on that device */
struct dma_map_ops *dma_ops;
void *dma_data;
};
struct pdev_archdata {
u64 dma_mask;
};
#endif /* _ASM_MICROBLAZE_DEVICE_H */

25
arch/microblaze/include/asm/dma-mapping.h
View File

@ -35,16 +35,6 @@
#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
#define __dma_free_coherent(size, addr) ((void)0)
static inline unsigned long device_to_mask(struct device *dev)
{
if (dev->dma_mask && *dev->dma_mask)
return *dev->dma_mask;
/* Assume devices without mask can take 32 bit addresses */
return 0xfffffffful;
}
extern struct dma_map_ops *dma_ops;
/*
* Available generic sets of operations
*/
@ -52,20 +42,7 @@ extern struct dma_map_ops dma_direct_ops;
static inline struct dma_map_ops *get_dma_ops(struct device *dev)
{
/* We don't handle the NULL dev case for ISA for now. We could
* do it via an out of line call but it is not needed for now. The
* only ISA DMA device we support is the floppy and we have a hack
* in the floppy driver directly to get a device for us.
*/
if (unlikely(!dev) || !dev->archdata.dma_ops)
return NULL;
return dev->archdata.dma_ops;
}
static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
{
dev->archdata.dma_ops = ops;
return &dma_direct_ops;
}
static inline int dma_supported(struct device *dev, u64 mask)

3
arch/microblaze/include/asm/io.h
View File

@ -19,17 +19,14 @@
#ifndef CONFIG_PCI
#define _IO_BASE 0
#define _ISA_MEM_BASE 0
#define PCI_DRAM_OFFSET 0
#else
#define _IO_BASE isa_io_base
#define _ISA_MEM_BASE isa_mem_base
#define PCI_DRAM_OFFSET pci_dram_offset
struct pci_dev;
extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
#define pci_iounmap pci_iounmap
extern unsigned long isa_io_base;
extern unsigned long pci_dram_offset;
extern resource_size_t isa_mem_base;
#endif

8
arch/microblaze/include/asm/pci.h
View File

@ -44,14 +44,6 @@ struct pci_dev;
*/
#define pcibios_assign_all_busses() 0
#ifdef CONFIG_PCI
extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
extern struct dma_map_ops *get_pci_dma_ops(void);
#else /* CONFIG_PCI */
#define set_pci_dma_ops(d)
#define get_pci_dma_ops() NULL
#endif
#ifdef CONFIG_PCI
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
enum pci_dma_burst_strategy *strat,

30
arch/microblaze/kernel/dma.c
View File

@ -13,23 +13,6 @@
#include <linux/export.h>
#include <linux/bug.h>
/*
* Generic direct DMA implementation
*
* This implementation supports a per-device offset that can be applied if
* the address at which memory is visible to devices is not 0. Platform code
* can set archdata.dma_data to an unsigned long holding the offset. By
* default the offset is PCI_DRAM_OFFSET.
*/
static unsigned long get_dma_direct_offset(struct device *dev)
{
if (likely(dev))
return (unsigned long)dev->archdata.dma_data;
return PCI_DRAM_OFFSET; /* FIXME Not sure if is correct */
}
#define NOT_COHERENT_CACHE
static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
@ -51,7 +34,7 @@ static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
return NULL;
ret = page_address(page);
memset(ret, 0, size);
*dma_handle = virt_to_phys(ret) + get_dma_direct_offset(dev);
*dma_handle = virt_to_phys(ret);
return ret;
#endif
@ -77,7 +60,7 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
/* FIXME this part of code is untested */
for_each_sg(sgl, sg, nents, i) {
sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
sg->dma_address = sg_phys(sg);
__dma_sync(page_to_phys(sg_page(sg)) + sg->offset,
sg->length, direction);
}
@ -85,12 +68,6 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
return nents;
}
static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction,
struct dma_attrs *attrs)
{
}
static int dma_direct_dma_supported(struct device *dev, u64 mask)
{
return 1;
@ -104,7 +81,7 @@ static inline dma_addr_t dma_direct_map_page(struct device *dev,
struct dma_attrs *attrs)
{
__dma_sync(page_to_phys(page) + offset, size, direction);
return page_to_phys(page) + offset + get_dma_direct_offset(dev);
return page_to_phys(page) + offset;
}
static inline void dma_direct_unmap_page(struct device *dev,
@ -181,7 +158,6 @@ struct dma_map_ops dma_direct_ops = {
.alloc = dma_direct_alloc_coherent,
.free = dma_direct_free_coherent,
.map_sg = dma_direct_map_sg,
.unmap_sg = dma_direct_unmap_sg,
.dma_supported = dma_direct_dma_supported,
.map_page = dma_direct_map_page,
.unmap_page = dma_direct_unmap_page,

2
arch/microblaze/kernel/head.S
View File

@ -205,7 +205,7 @@ GT4: /* r11 contains the rest - will be either 1 or 4 */
GT16: /* TLB0 is 16MB */
addik r9, r0, 0x1000000 /* means TLB0 is 16MB */
TLB1:
/* must be used r2 because of substract if failed */
/* must be used r2 because of subtract if failed */
addik r2, r11, -0x0400000
bgei r2, GT20 /* size is greater than 16MB */
/* size is >16MB and <20MB */

34
arch/microblaze/kernel/setup.c
View File

@ -71,13 +71,9 @@ void __init setup_arch(char **cmdline_p)
xilinx_pci_init();
#ifdef CONFIG_VT
#if defined(CONFIG_XILINX_CONSOLE)
conswitchp = &xil_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
#if defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
#endif
#endif
}
#ifdef CONFIG_MTD_UCLINUX
@ -229,31 +225,3 @@ static int __init debugfs_tlb(void)
device_initcall(debugfs_tlb);
# endif
#endif
static int dflt_bus_notify(struct notifier_block *nb,
unsigned long action, void *data)
{
struct device *dev = data;
/* We are only intereted in device addition */
if (action != BUS_NOTIFY_ADD_DEVICE)
return 0;
set_dma_ops(dev, &dma_direct_ops);
return NOTIFY_DONE;
}
static struct notifier_block dflt_plat_bus_notifier = {
.notifier_call = dflt_bus_notify,
.priority = INT_MAX,
};
static int __init setup_bus_notifier(void)
{
bus_register_notifier(&platform_bus_type, &dflt_plat_bus_notifier);
return 0;
}
arch_initcall(setup_bus_notifier);

19
arch/microblaze/pci/pci-common.c
View File

@ -47,24 +47,9 @@ static int global_phb_number; /* Global phb counter */
/* ISA Memory physical address */
resource_size_t isa_mem_base;
static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
unsigned long isa_io_base;
unsigned long pci_dram_offset;
static int pci_bus_count;
void set_pci_dma_ops(struct dma_map_ops *dma_ops)
{
pci_dma_ops = dma_ops;
}
struct dma_map_ops *get_pci_dma_ops(void)
{
return pci_dma_ops;
}
EXPORT_SYMBOL(get_pci_dma_ops);
struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
{
struct pci_controller *phb;
@ -866,10 +851,6 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
*/
set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
/* Hook up default DMA ops */
set_dma_ops(&dev->dev, pci_dma_ops);
dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
/* Read default IRQs and fixup if necessary */
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
}

3
drivers/of/platform.c
View File

@ -138,9 +138,6 @@ struct platform_device *of_device_alloc(struct device_node *np,
}
dev->dev.of_node = of_node_get(np);
#if defined(CONFIG_MICROBLAZE)
dev->dev.dma_mask = &dev->archdata.dma_mask;
#endif
dev->dev.parent = parent;
if (bus_id)