docs: i2c: call it "I2C" consistently
Uppercase "I2C" is used almost everywhere in the docs, but the lowercase version "i2c" is used somewhere. Use the uppercase form consistently. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Acked-by: Peter Rosin <peda@axentia.se> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
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@ -2,26 +2,26 @@
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I2C Device Interface
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====================
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Usually, i2c devices are controlled by a kernel driver. But it is also
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Usually, I2C devices are controlled by a kernel driver. But it is also
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possible to access all devices on an adapter from userspace, through
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the /dev interface. You need to load module i2c-dev for this.
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Each registered i2c adapter gets a number, counting from 0. You can
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Each registered I2C adapter gets a number, counting from 0. You can
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examine /sys/class/i2c-dev/ to see what number corresponds to which adapter.
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Alternatively, you can run "i2cdetect -l" to obtain a formatted list of all
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i2c adapters present on your system at a given time. i2cdetect is part of
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I2C adapters present on your system at a given time. i2cdetect is part of
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the i2c-tools package.
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I2C device files are character device files with major device number 89
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and a minor device number corresponding to the number assigned as
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explained above. They should be called "i2c-%d" (i2c-0, i2c-1, ...,
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i2c-10, ...). All 256 minor device numbers are reserved for i2c.
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i2c-10, ...). All 256 minor device numbers are reserved for I2C.
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C example
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=========
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So let's say you want to access an i2c adapter from a C program.
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So let's say you want to access an I2C adapter from a C program.
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First, you need to include these two headers::
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#include <linux/i2c-dev.h>
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@ -66,7 +66,7 @@ the device supports them. Both are illustrated below::
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/* Using SMBus commands */
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res = i2c_smbus_read_word_data(file, reg);
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if (res < 0) {
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/* ERROR HANDLING: i2c transaction failed */
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/* ERROR HANDLING: I2C transaction failed */
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} else {
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/* res contains the read word */
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}
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@ -79,12 +79,12 @@ the device supports them. Both are illustrated below::
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buf[1] = 0x43;
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buf[2] = 0x65;
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if (write(file, buf, 3) != 3) {
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/* ERROR HANDLING: i2c transaction failed */
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/* ERROR HANDLING: I2C transaction failed */
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}
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/* Using I2C Read, equivalent of i2c_smbus_read_byte(file) */
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if (read(file, buf, 1) != 1) {
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/* ERROR HANDLING: i2c transaction failed */
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/* ERROR HANDLING: I2C transaction failed */
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} else {
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/* buf[0] contains the read byte */
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}
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@ -144,7 +144,7 @@ The following IOCTLs are defined:
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If possible, use the provided ``i2c_smbus_*`` methods described below instead
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of issuing direct ioctls.
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You can do plain i2c transactions by using read(2) and write(2) calls.
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You can do plain I2C transactions by using read(2) and write(2) calls.
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You do not need to pass the address byte; instead, set it through
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ioctl I2C_SLAVE before you try to access the device.
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@ -2,7 +2,7 @@
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Linux I2C and DMA
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=================
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Given that i2c is a low-speed bus, over which the majority of messages
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Given that I2C is a low-speed bus, over which the majority of messages
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transferred are small, it is not considered a prime user of DMA access. At this
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time of writing, only 10% of I2C bus master drivers have DMA support
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implemented. And the vast majority of transactions are so small that setting up
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@ -2,7 +2,7 @@
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I2C Protocol
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============
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This document describes the i2c protocol. Or will, when it is finished :-)
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This document describes the I2C protocol. Or will, when it is finished :-)
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Key to symbols
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==============
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@ -57,7 +57,7 @@ Modified transactions
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=====================
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The following modifications to the I2C protocol can also be generated by
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setting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
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setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they
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are usually only needed to work around device issues:
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I2C_M_IGNORE_NAK:
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@ -2,8 +2,8 @@
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I2C topology
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============
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There are a couple of reasons for building more complex i2c topologies
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than a straight-forward i2c bus with one adapter and one or more devices.
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There are a couple of reasons for building more complex I2C topologies
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than a straight-forward I2C bus with one adapter and one or more devices.
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1. A mux may be needed on the bus to prevent address collisions.
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@ -11,20 +11,20 @@ than a straight-forward i2c bus with one adapter and one or more devices.
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may be needed to determine if it is ok to access the bus.
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3. A device (particularly RF tuners) may want to avoid the digital noise
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from the i2c bus, at least most of the time, and sits behind a gate
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from the I2C bus, at least most of the time, and sits behind a gate
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that has to be operated before the device can be accessed.
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Etc
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===
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These constructs are represented as i2c adapter trees by Linux, where
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These constructs are represented as I2C adapter trees by Linux, where
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each adapter has a parent adapter (except the root adapter) and zero or
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more child adapters. The root adapter is the actual adapter that issues
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i2c transfers, and all adapters with a parent are part of an "i2c-mux"
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I2C transfers, and all adapters with a parent are part of an "i2c-mux"
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object (quoted, since it can also be an arbitrator or a gate).
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Depending of the particular mux driver, something happens when there is
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an i2c transfer on one of its child adapters. The mux driver can
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an I2C transfer on one of its child adapters. The mux driver can
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obviously operate a mux, but it can also do arbitration with an external
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bus master or open a gate. The mux driver has two operations for this,
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select and deselect. select is called before the transfer and (the
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Locking
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=======
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There are two variants of locking available to i2c muxes, they can be
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There are two variants of locking available to I2C muxes, they can be
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mux-locked or parent-locked muxes. As is evident from below, it can be
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useful to know if a mux is mux-locked or if it is parent-locked. The
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following list was correct at the time of writing:
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i2c-arb-gpio-challenge Parent-locked
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i2c-mux-gpio Normally parent-locked, mux-locked iff
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all involved gpio pins are controlled by the
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same i2c root adapter that they mux.
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same I2C root adapter that they mux.
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i2c-mux-gpmux Normally parent-locked, mux-locked iff
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specified in device-tree.
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i2c-mux-ltc4306 Mux-locked
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i2c-mux-pca954x Parent-locked
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i2c-mux-pinctrl Normally parent-locked, mux-locked iff
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all involved pinctrl devices are controlled
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by the same i2c root adapter that they mux.
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by the same I2C root adapter that they mux.
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i2c-mux-reg Parent-locked
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====================== =============================================
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Mux-locked muxes does not lock the entire parent adapter during the
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full select-transfer-deselect transaction, only the muxes on the parent
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adapter are locked. Mux-locked muxes are mostly interesting if the
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select and/or deselect operations must use i2c transfers to complete
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select and/or deselect operations must use I2C transfers to complete
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their tasks. Since the parent adapter is not fully locked during the
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full transaction, unrelated i2c transfers may interleave the different
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full transaction, unrelated I2C transfers may interleave the different
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stages of the transaction. This has the benefit that the mux driver
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may be easier and cleaner to implement, but it has some caveats.
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ML3. A mux-locked mux cannot be used by a driver for auto-closing
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gates/muxes, i.e. something that closes automatically after a given
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number (one, in most cases) of i2c transfers. Unrelated i2c transfers
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number (one, in most cases) of I2C transfers. Unrelated I2C transfers
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may creep in and close prematurely.
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ML4. If any non-i2c operation in the mux driver changes the i2c mux state,
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ML4. If any non-I2C operation in the mux driver changes the I2C mux state,
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the driver has to lock the root adapter during that operation.
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Otherwise garbage may appear on the bus as seen from devices
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behind the mux, when an unrelated i2c transfer is in flight during
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the non-i2c mux-changing operation.
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behind the mux, when an unrelated I2C transfer is in flight during
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the non-I2C mux-changing operation.
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==== =====================================================================
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When there is an access to D1, this happens:
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1. Someone issues an i2c-transfer to D1.
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1. Someone issues an I2C-transfer to D1.
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2. M1 locks muxes on its parent (the root adapter in this case).
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3. M1 calls ->select to ready the mux.
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4. M1 (presumably) does some i2c-transfers as part of its select.
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These transfers are normal i2c-transfers that locks the parent
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4. M1 (presumably) does some I2C-transfers as part of its select.
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These transfers are normal I2C-transfers that locks the parent
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adapter.
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5. M1 feeds the i2c-transfer from step 1 to its parent adapter as a
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normal i2c-transfer that locks the parent adapter.
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5. M1 feeds the I2C-transfer from step 1 to its parent adapter as a
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normal I2C-transfer that locks the parent adapter.
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6. M1 calls ->deselect, if it has one.
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7. Same rules as in step 4, but for ->deselect.
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8. M1 unlocks muxes on its parent.
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Parent-locked muxes lock the parent adapter during the full select-
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transfer-deselect transaction. The implication is that the mux driver
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has to ensure that any and all i2c transfers through that parent
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adapter during the transaction are unlocked i2c transfers (using e.g.
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has to ensure that any and all I2C transfers through that parent
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adapter during the transaction are unlocked I2C transfers (using e.g.
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__i2c_transfer), or a deadlock will follow. There are a couple of
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caveats.
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of another mux, this might break a possible assumption from the
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child mux that the root adapter is unused between its select op
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and the actual transfer (e.g. if the child mux is auto-closing
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and the parent mux issus i2c-transfers as part of its select).
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and the parent mux issus I2C-transfers as part of its select).
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This is especially the case if the parent mux is mux-locked, but
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it may also happen if the parent mux is parent-locked.
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PL2. If select/deselect calls out to other subsystems such as gpio,
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pinctrl, regmap or iio, it is essential that any i2c transfers
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pinctrl, regmap or iio, it is essential that any I2C transfers
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caused by these subsystems are unlocked. This can be convoluted to
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accomplish, maybe even impossible if an acceptably clean solution
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is sought.
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When there is an access to D1, this happens:
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1. Someone issues an i2c-transfer to D1.
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1. Someone issues an I2C-transfer to D1.
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2. M1 locks muxes on its parent (the root adapter in this case).
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3. M1 locks its parent adapter.
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4. M1 calls ->select to ready the mux.
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5. If M1 does any i2c-transfers (on this root adapter) as part of
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its select, those transfers must be unlocked i2c-transfers so
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5. If M1 does any I2C-transfers (on this root adapter) as part of
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its select, those transfers must be unlocked I2C-transfers so
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that they do not deadlock the root adapter.
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6. M1 feeds the i2c-transfer from step 1 to the root adapter as an
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unlocked i2c-transfer, so that it does not deadlock the parent
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6. M1 feeds the I2C-transfer from step 1 to the root adapter as an
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unlocked I2C-transfer, so that it does not deadlock the parent
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adapter.
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7. M1 calls ->deselect, if it has one.
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8. Same rules as in step 5, but for ->deselect.
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the buck to the root adapter).
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This topology is bad if M2 is an auto-closing mux and M1->select
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issues any unlocked i2c transfers on the root adapter that may leak
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issues any unlocked I2C transfers on the root adapter that may leak
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through and be seen by the M2 adapter, thus closing M2 prematurely.
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This kind of topology is generally not suitable and should probably
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be avoided. The reason is that M2 probably assumes that there will
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be no i2c transfers during its calls to ->select and ->deselect, and
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be no I2C transfers during its calls to ->select and ->deselect, and
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if there are, any such transfers might appear on the slave side of M2
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as partial i2c transfers, i.e. garbage or worse. This might cause
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as partial I2C transfers, i.e. garbage or worse. This might cause
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device lockups and/or other problems.
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The topology is especially troublesome if M2 is an auto-closing
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mux. In that case, any interleaved accesses to D4 might close M2
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prematurely, as might any i2c-transfers part of M1->select.
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prematurely, as might any I2C-transfers part of M1->select.
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But if M2 is not making the above stated assumption, and if M2 is not
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auto-closing, the topology is fine.
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or when the underlying I2C bus is itself destroyed, whichever happens
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first.
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Those of you familiar with the i2c subsystem of 2.4 kernels and early 2.6
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Those of you familiar with the I2C subsystem of 2.4 kernels and early 2.6
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kernels will find out that this method 3 is essentially similar to what
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was done there. Two significant differences are:
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I2C device driver binding control from user-space
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=================================================
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Up to kernel 2.6.32, many i2c drivers used helper macros provided by
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Up to kernel 2.6.32, many I2C drivers used helper macros provided by
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<linux/i2c.h> which created standard module parameters to let the user
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control how the driver would probe i2c buses and attach to devices. These
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control how the driver would probe I2C buses and attach to devices. These
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parameters were known as "probe" (to let the driver probe for an extra
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address), "force" (to forcibly attach the driver to a given device) and
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"ignore" (to prevent a driver from probing a given address).
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With the conversion of the i2c subsystem to the standard device driver
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With the conversion of the I2C subsystem to the standard device driver
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binding model, it became clear that these per-module parameters were no
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longer needed, and that a centralized implementation was possible. The new,
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sysfs-based interface is described in the documentation file
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ret = i2c_slave_event(client, event, &val)
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'client' describes the i2c slave device. 'event' is one of the special event
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'client' describes the I2C slave device. 'event' is one of the special event
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types described hereafter. 'val' holds an u8 value for the data byte to be
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read/written and is thus bidirectional. The pointer to val must always be
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provided even if val is not used for an event, i.e. don't use NULL here. 'ret'
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If you want to add slave support to the bus driver:
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* implement calls to register/unregister the slave and add those to the
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struct i2c_algorithm. When registering, you probably need to set the i2c
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struct i2c_algorithm. When registering, you probably need to set the I2C
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slave address and enable slave specific interrupts. If you use runtime pm, you
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should use pm_runtime_get_sync() because your device usually needs to be
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powered on always to be able to detect its slave address. When unregistering,
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@ -95,7 +95,7 @@ to gather information from the client, or write new information to the
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client.
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I have found it useful to define foo_read and foo_write functions for this.
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For some cases, it will be easier to call the i2c functions directly,
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For some cases, it will be easier to call the I2C functions directly,
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but many chips have some kind of register-value idea that can easily
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be encapsulated.
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int i2c_master_recv(struct i2c_client *client, char *buf, int count);
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These routines read and write some bytes from/to a client. The client
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contains the i2c address, so you do not have to include it. The second
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contains the I2C address, so you do not have to include it. The second
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parameter contains the bytes to read/write, the third the number of bytes
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to read/write (must be less than the length of the buffer, also should be
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less than 64k since msg.len is u16.) Returned is the actual number of bytes
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