x86: move VMX MSRs to msr-index.h
They are hardware specific MSRs, and we would use them in virtualization feature detection later. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -331,21 +331,6 @@ enum vmcs_field {
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#define AR_RESERVD_MASK 0xfffe0f00
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#define MSR_IA32_VMX_BASIC 0x480
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#define MSR_IA32_VMX_PINBASED_CTLS 0x481
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#define MSR_IA32_VMX_PROCBASED_CTLS 0x482
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#define MSR_IA32_VMX_EXIT_CTLS 0x483
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#define MSR_IA32_VMX_ENTRY_CTLS 0x484
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#define MSR_IA32_VMX_MISC 0x485
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#define MSR_IA32_VMX_CR0_FIXED0 0x486
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#define MSR_IA32_VMX_CR0_FIXED1 0x487
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#define MSR_IA32_VMX_CR4_FIXED0 0x488
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#define MSR_IA32_VMX_CR4_FIXED1 0x489
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#define MSR_IA32_VMX_VMCS_ENUM 0x48a
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#define MSR_IA32_VMX_PROCBASED_CTLS2 0x48b
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#define MSR_IA32_VMX_EPT_VPID_CAP 0x48c
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#define MSR_IA32_FEATURE_CONTROL 0x3a
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#define MSR_IA32_FEATURE_CONTROL_LOCKED 0x1
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#define MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED 0x4
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@ -176,6 +176,7 @@
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#define MSR_IA32_TSC 0x00000010
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#define MSR_IA32_PLATFORM_ID 0x00000017
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#define MSR_IA32_EBL_CR_POWERON 0x0000002a
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#define MSR_IA32_FEATURE_CONTROL 0x0000003a
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#define MSR_IA32_APICBASE 0x0000001b
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#define MSR_IA32_APICBASE_BSP (1<<8)
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@ -310,4 +311,19 @@
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/* Geode defined MSRs */
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#define MSR_GEODE_BUSCONT_CONF0 0x00001900
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/* Intel VT MSRs */
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#define MSR_IA32_VMX_BASIC 0x00000480
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#define MSR_IA32_VMX_PINBASED_CTLS 0x00000481
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#define MSR_IA32_VMX_PROCBASED_CTLS 0x00000482
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#define MSR_IA32_VMX_EXIT_CTLS 0x00000483
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#define MSR_IA32_VMX_ENTRY_CTLS 0x00000484
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#define MSR_IA32_VMX_MISC 0x00000485
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#define MSR_IA32_VMX_CR0_FIXED0 0x00000486
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#define MSR_IA32_VMX_CR0_FIXED1 0x00000487
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#define MSR_IA32_VMX_CR4_FIXED0 0x00000488
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#define MSR_IA32_VMX_CR4_FIXED1 0x00000489
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#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
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#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
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#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
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#endif /* ASM_X86__MSR_INDEX_H */
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