dma-mapping: always build the direct mapping code
All architectures except for sparc64 use the dma-direct code in some form, and even for sparc64 we had the discussion of a direct mapping mode a while ago. In preparation for directly calling the direct mapping code don't bother having it optionally but always build the code in. This is a minor hardship for some powerpc and arm configs that don't pull it in yet (although they should in a relase ot two), and sparc64 which currently doesn't need it at all, but it will reduce the ifdef mess we'd otherwise need significantly. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Jesper Dangaard Brouer <brouer@redhat.com> Tested-by: Jesper Dangaard Brouer <brouer@redhat.com> Tested-by: Tony Luck <tony.luck@intel.com>
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@ -203,7 +203,6 @@ config ALPHA_EIGER
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config ALPHA_JENSEN
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bool "Jensen"
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depends on BROKEN
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select DMA_DIRECT_OPS
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help
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DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one
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of the first-generation Alpha systems. A number of these systems
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@ -17,7 +17,6 @@ config ARC
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
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select GENERIC_CLOCKEVENTS
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select GENERIC_FIND_FIRST_BIT
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@ -30,7 +30,6 @@ config ARM
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select CLONE_BACKWARDS
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select CPU_PM if (SUSPEND || CPU_IDLE)
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select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
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select DMA_DIRECT_OPS if !MMU
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select DMA_REMAP if MMU
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select EDAC_SUPPORT
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select EDAC_ATOMIC_SCRUB
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@ -80,7 +80,6 @@ config ARM64
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select CPU_PM if (SUSPEND || CPU_IDLE)
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select CRC32
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select DCACHE_WORD_ACCESS
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select DMA_DIRECT_OPS
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select DMA_DIRECT_REMAP
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select EDAC_SUPPORT
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select FRAME_POINTER
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@ -9,7 +9,6 @@ config C6X
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select CLKDEV_LOOKUP
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64
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select GENERIC_IRQ_SHOW
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select HAVE_ARCH_TRACEHOOK
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@ -7,7 +7,6 @@ config CSKY
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select COMMON_CLK
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select CLKSRC_MMIO
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select CLKSRC_OF
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select DMA_DIRECT_OPS
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select DMA_DIRECT_REMAP
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select IRQ_DOMAIN
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select HANDLE_DOMAIN_IRQ
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@ -22,7 +22,6 @@ config H8300
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select HAVE_ARCH_KGDB
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select HAVE_ARCH_HASH
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select CPU_NO_EFFICIENT_FFS
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select DMA_DIRECT_OPS
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config CPU_BIG_ENDIAN
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def_bool y
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@ -31,7 +31,6 @@ config HEXAGON
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select GENERIC_CLOCKEVENTS_BROADCAST
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select MODULES_USE_ELF_RELA
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select GENERIC_CPU_DEVICES
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select DMA_DIRECT_OPS
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---help---
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Qualcomm Hexagon is a processor architecture designed for high
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performance and low power across a wide variety of applications.
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@ -26,7 +26,6 @@ config M68K
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select MODULES_USE_ELF_RELA
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select OLD_SIGSUSPEND3
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select OLD_SIGACTION
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select DMA_DIRECT_OPS if HAS_DMA
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select ARCH_DISCARD_MEMBLOCK
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config CPU_BIG_ENDIAN
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@ -12,7 +12,6 @@ config MICROBLAZE
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select TIMER_OF
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select CLONE_BACKWARDS3
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select COMMON_CLK
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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@ -16,7 +16,6 @@ config MIPS
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select CPU_PM if CPU_IDLE
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64 if !64BIT
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select GENERIC_CLOCKEVENTS
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select GENERIC_CMOS_UPDATE
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@ -11,7 +11,6 @@ config NDS32
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select CLKSRC_MMIO
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64
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select GENERIC_CPU_DEVICES
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select GENERIC_CLOCKEVENTS
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@ -4,7 +4,6 @@ config NIOS2
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_NO_SWAP
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select DMA_DIRECT_OPS
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select TIMER_OF
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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@ -7,7 +7,6 @@
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config OPENRISC
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def_bool y
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select DMA_DIRECT_OPS
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select OF
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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@ -185,7 +185,6 @@ config PA11
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depends on PA7000 || PA7100LC || PA7200 || PA7300LC
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select DMA_DIRECT_OPS
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select DMA_NONCOHERENT_CACHE_SYNC
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config PREFETCH
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@ -19,7 +19,6 @@ config RISCV
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select ARCH_WANT_FRAME_POINTERS
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_DIRECT_OPS
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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select GENERIC_IRQ_SHOW
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@ -139,7 +139,6 @@ config S390
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select HAVE_COPY_THREAD_TLS
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DMA_CONTIGUOUS
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select DMA_DIRECT_OPS
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select HAVE_DYNAMIC_FTRACE
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select HAVE_DYNAMIC_FTRACE_WITH_REGS
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select HAVE_EFFICIENT_UNALIGNED_ACCESS
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@ -7,7 +7,6 @@ config SUPERH
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select ARCH_NO_COHERENT_DMA_MMAP if !MMU
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select HAVE_PATA_PLATFORM
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select CLKDEV_LOOKUP
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select DMA_DIRECT_OPS
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select HAVE_IDE if HAS_IOPORT_MAP
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select HAVE_MEMBLOCK_NODE_MAP
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select ARCH_DISCARD_MEMBLOCK
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@ -48,7 +48,6 @@ config SPARC
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config SPARC32
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def_bool !64BIT
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select DMA_DIRECT_OPS
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select GENERIC_ATOMIC64
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select CLZ_TAB
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select HAVE_UID16
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@ -4,7 +4,6 @@ config UNICORE32
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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select DMA_DIRECT_OPS
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select HAVE_GENERIC_DMA_COHERENT
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select HAVE_KERNEL_GZIP
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select HAVE_KERNEL_BZIP2
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@ -89,7 +89,6 @@ config X86
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select CLOCKSOURCE_VALIDATE_LAST_CYCLE
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select CLOCKSOURCE_WATCHDOG
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select DCACHE_WORD_ACCESS
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select DMA_DIRECT_OPS
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select EDAC_ATOMIC_SCRUB
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select EDAC_SUPPORT
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select GENERIC_CLOCKEVENTS
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@ -9,7 +9,6 @@ config XTENSA
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_DIRECT_OPS
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select DMA_REMAP if MMU
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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@ -35,13 +35,8 @@ config ARCH_HAS_DMA_COHERENT_TO_PFN
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config ARCH_HAS_DMA_MMAP_PGPROT
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bool
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config DMA_DIRECT_OPS
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bool
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depends on HAS_DMA
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config DMA_NONCOHERENT_CACHE_SYNC
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bool
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depends on DMA_DIRECT_OPS
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config DMA_VIRT_OPS
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bool
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config SWIOTLB
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bool
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select DMA_DIRECT_OPS
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select NEED_DMA_MAP_STATE
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config DMA_REMAP
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config DMA_DIRECT_REMAP
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bool
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depends on DMA_DIRECT_OPS
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select DMA_REMAP
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@ -1,9 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_HAS_DMA) += mapping.o
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obj-$(CONFIG_HAS_DMA) += mapping.o direct.o
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obj-$(CONFIG_DMA_CMA) += contiguous.o
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obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += coherent.o
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obj-$(CONFIG_DMA_DIRECT_OPS) += direct.o
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obj-$(CONFIG_DMA_VIRT_OPS) += virt.o
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obj-$(CONFIG_DMA_API_DEBUG) += debug.o
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obj-$(CONFIG_SWIOTLB) += swiotlb.o
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