AMD IOMMU: some set_device_domain cleanups
Remove some magic numbers and split the pte_root using standard functions. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -739,12 +739,13 @@ static void set_device_domain(struct amd_iommu *iommu,
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u64 pte_root = virt_to_phys(domain->pt_root);
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pte_root |= (domain->mode & 0x07) << 9;
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pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | 2;
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pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
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<< DEV_ENTRY_MODE_SHIFT;
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pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
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write_lock_irqsave(&amd_iommu_devtable_lock, flags);
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amd_iommu_dev_table[devid].data[0] = pte_root;
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amd_iommu_dev_table[devid].data[1] = pte_root >> 32;
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amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
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amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
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amd_iommu_dev_table[devid].data[2] = domain->id;
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amd_iommu_pd_table[devid] = domain;
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@ -130,6 +130,8 @@
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#define DEV_ENTRY_NMI_PASS 0xba
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#define DEV_ENTRY_LINT0_PASS 0xbe
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#define DEV_ENTRY_LINT1_PASS 0xbf
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#define DEV_ENTRY_MODE_MASK 0x07
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#define DEV_ENTRY_MODE_SHIFT 0x09
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/* constants to configure the command buffer */
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#define CMD_BUFFER_SIZE 8192
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@ -159,6 +161,7 @@
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#define IOMMU_MAP_SIZE_L3 (1ULL << 39)
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#define IOMMU_PTE_P (1ULL << 0)
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#define IOMMU_PTE_TV (1ULL << 1)
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#define IOMMU_PTE_U (1ULL << 59)
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#define IOMMU_PTE_FC (1ULL << 60)
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#define IOMMU_PTE_IR (1ULL << 61)
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