luck/tmp_suning_uos_patched
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S3C24XX: ensure we only configure valid GPIOs

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If we specify an GPIO which cannot be used for the purpose, then assume
that the GPIO is not to be used and do not try and configure it.  This can
be the case where the SPI bus is TX only.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Ben Dooks 2007-11-28 16:21:29 -08:00 committed by Linus Torvalds
parent 3ac40b9b5e
commit 438ae1ae7b
1 changed files with 13 additions and 7 deletions
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20
drivers/spi/spi_s3c24xx_gpio.c
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@ -96,6 +96,7 @@ static void s3c2410_spigpio_chipselect(struct spi_device *dev, int value)
static int s3c2410_spigpio_probe(struct platform_device *dev)
{
struct s3c2410_spigpio_info *info;
struct spi_master *master;
struct s3c2410_spigpio *sp;
int ret;
@ -113,7 +114,7 @@ static int s3c2410_spigpio_probe(struct platform_device *dev)
platform_set_drvdata(dev, sp);
/* copy in the plkatform data */
sp->info = dev->dev.platform_data;
info = sp->info = dev->dev.platform_data;
/* setup spi bitbang adaptor */
sp->bitbang.master = spi_master_get(master);
@ -124,13 +125,18 @@ static int s3c2410_spigpio_probe(struct platform_device *dev)
sp->bitbang.txrx_word[SPI_MODE_2] = s3c2410_spigpio_txrx_mode2;
sp->bitbang.txrx_word[SPI_MODE_3] = s3c2410_spigpio_txrx_mode3;
/* set state of spi pins */
s3c2410_gpio_setpin(sp->info->pin_clk, 0);
s3c2410_gpio_setpin(sp->info->pin_mosi, 0);
/* set state of spi pins, always assume that the clock is
* available, but do check the MOSI and MISO. */
s3c2410_gpio_setpin(info->pin_clk, 0);
s3c2410_gpio_cfgpin(info->pin_clk, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(sp->info->pin_clk, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(sp->info->pin_mosi, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(sp->info->pin_miso, S3C2410_GPIO_INPUT);
if (info->pin_mosi < S3C2410_GPH10) {
s3c2410_gpio_setpin(info->pin_mosi, 0);
s3c2410_gpio_cfgpin(info->pin_mosi, S3C2410_GPIO_OUTPUT);
}
if (info->pin_miso != S3C2410_GPA0 && info->pin_miso < S3C2410_GPH10)
s3c2410_gpio_cfgpin(info->pin_miso, S3C2410_GPIO_INPUT);
ret = spi_bitbang_start(&sp->bitbang);
if (ret)