luck/tmp_suning_uos_patched
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ARM: imx6q: let users input debug uart port number

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imx6q gets 5 uart ports in total.  Different board design may choose
different port as debug uart.  For example, imx6q-sabresd uses UART1,
imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4.  Rather than
bloating DEBUG_LL choice list with all these uart ports, the patch
introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number
when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Shawn Guo 2012-10-08 13:44:29 +08:00
parent 2a32467135
commit 49c9e60eaa
4 changed files with 47 additions and 31 deletions
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26
arch/arm/Kconfig.debug
View File

@ -209,20 +209,12 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX50 or i.MX53.
config DEBUG_IMX6Q_UART2
bool "i.MX6Q Debug UART2"
config DEBUG_IMX6Q_UART
bool "i.MX6Q Debug UART"
depends on SOC_IMX6Q
help
Say Y here if you want kernel low-level debugging support
on i.MX6Q UART2. This is correct for e.g. the SabreLite
board.
config DEBUG_IMX6Q_UART4
bool "i.MX6Q Debug UART4"
depends on SOC_IMX6Q
help
Say Y here if you want kernel low-level debugging support
on i.MX6Q UART4.
on i.MX6Q.
config DEBUG_MMP_UART2
bool "Kernel low-level debugging message via MMP UART2"
@ -409,6 +401,15 @@ choice
endchoice
config DEBUG_IMX6Q_UART_PORT
int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART
range 1 5
default 1
depends on SOC_IMX6Q
help
Choose UART port on which kernel low-level debug messages
should be output.
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
@ -418,8 +419,7 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX31_IMX35_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX50_IMX53_UART ||\
DEBUG_IMX6Q_UART2 || \
DEBUG_IMX6Q_UART4
DEBUG_IMX6Q_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART

20
arch/arm/include/debug/imx.S
View File

@ -10,6 +10,20 @@
* published by the Free Software Foundation.
*
*/
#define IMX6Q_UART1_BASE_ADDR 0x02020000
#define IMX6Q_UART2_BASE_ADDR 0x021e8000
#define IMX6Q_UART3_BASE_ADDR 0x021ec000
#define IMX6Q_UART4_BASE_ADDR 0x021f0000
#define IMX6Q_UART5_BASE_ADDR 0x021f4000
/*
* IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
* of IMX6Q_UART##n##_BASE_ADDR.
*/
#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
#ifdef CONFIG_DEBUG_IMX1_UART
#define UART_PADDR 0x00206000
#elif defined (CONFIG_DEBUG_IMX25_UART)
@ -22,10 +36,8 @@
#define UART_PADDR 0x73fbc000
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
#define UART_PADDR 0x53fbc000
#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
#define UART_PADDR 0x021e8000
#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
#define UART_PADDR 0x021f0000
#elif defined (CONFIG_DEBUG_IMX6Q_UART)
#define UART_PADDR IMX6Q_DEBUG_UART_BASE
#endif
/*

28
arch/arm/mach-imx/lluart.c
View File

@ -17,17 +17,25 @@
#include "hardware.h"
#define IMX6Q_UART1_BASE_ADDR 0x02020000
#define IMX6Q_UART2_BASE_ADDR 0x021e8000
#define IMX6Q_UART3_BASE_ADDR 0x021ec000
#define IMX6Q_UART4_BASE_ADDR 0x021f0000
#define IMX6Q_UART5_BASE_ADDR 0x021f4000
/*
* IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion
* of IMX6Q_UART##n##_BASE_ADDR.
*/
#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT)
static struct map_desc imx_lluart_desc = {
#ifdef CONFIG_DEBUG_IMX6Q_UART2
.virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),
.pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR),
.length = MX6Q_UART2_SIZE,
.type = MT_DEVICE,
#endif
#ifdef CONFIG_DEBUG_IMX6Q_UART4
.virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
.pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
.length = MX6Q_UART4_SIZE,
#ifdef CONFIG_DEBUG_IMX6Q_UART
.virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE),
.pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE),
.length = 0x4000,
.type = MT_DEVICE,
#endif
};

4
arch/arm/mach-imx/mx6q.h
View File

@ -27,9 +27,5 @@
#define MX6Q_CCM_SIZE 0x4000
#define MX6Q_ANATOP_BASE_ADDR 0x020c8000
#define MX6Q_ANATOP_SIZE 0x1000
#define MX6Q_UART2_BASE_ADDR 0x021e8000
#define MX6Q_UART2_SIZE 0x4000
#define MX6Q_UART4_BASE_ADDR 0x021f0000
#define MX6Q_UART4_SIZE 0x4000
#endif /* __MACH_MX6Q_H__ */