omapfb: dispc: allow multiple external IRQ handlers
Previously, the only external (to dispc.c) IRQ handler was RFBI's frame done handler. dispc's IRQ framework was very dumb: you could only have one handler, and the semantics of {request,free}_irq were odd, to say the least. The new framework allows multiple consumers to register arbitrary IRQ masks. Signed-off-by: Daniel Stone <daniel.stone@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Imre Deak <imre.deak@nokia.com> Acked-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -155,6 +155,8 @@ struct resmap {
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unsigned long *map;
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};
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#define MAX_IRQ_HANDLERS 4
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static struct {
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void __iomem *base;
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@ -167,9 +169,11 @@ static struct {
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int ext_mode;
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unsigned long enabled_irqs;
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void (*irq_callback)(void *);
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void *irq_callback_data;
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struct {
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u32 irq_mask;
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void (*callback)(void *);
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void *data;
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} irq_handlers[MAX_IRQ_HANDLERS];
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struct completion frame_done;
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int fir_hinc[OMAPFB_PLANE_NUM];
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@ -809,56 +813,70 @@ static void set_lcd_timings(void)
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panel->pixel_clock = fck / lck_div / pck_div / 1000;
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}
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int omap_dispc_request_irq(void (*callback)(void *data), void *data)
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static void recalc_irq_mask(void)
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{
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int r = 0;
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int i;
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unsigned long irq_mask = DISPC_IRQ_MASK_ERROR;
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for (i = 0; i < MAX_IRQ_HANDLERS; i++) {
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if (!dispc.irq_handlers[i].callback)
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continue;
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irq_mask |= dispc.irq_handlers[i].irq_mask;
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}
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enable_lcd_clocks(1);
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MOD_REG_FLD(DISPC_IRQENABLE, 0x7fff, irq_mask);
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enable_lcd_clocks(0);
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}
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int omap_dispc_request_irq(unsigned long irq_mask, void (*callback)(void *data),
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void *data)
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{
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int i;
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BUG_ON(callback == NULL);
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if (dispc.irq_callback)
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r = -EBUSY;
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else {
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dispc.irq_callback = callback;
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dispc.irq_callback_data = data;
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for (i = 0; i < MAX_IRQ_HANDLERS; i++) {
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if (dispc.irq_handlers[i].callback)
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continue;
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dispc.irq_handlers[i].irq_mask = irq_mask;
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dispc.irq_handlers[i].callback = callback;
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dispc.irq_handlers[i].data = data;
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recalc_irq_mask();
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return 0;
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}
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return r;
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return -EBUSY;
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}
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EXPORT_SYMBOL(omap_dispc_request_irq);
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void omap_dispc_enable_irqs(int irq_mask)
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void omap_dispc_free_irq(unsigned long irq_mask, void (*callback)(void *data),
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void *data)
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{
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enable_lcd_clocks(1);
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dispc.enabled_irqs = irq_mask;
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irq_mask |= DISPC_IRQ_MASK_ERROR;
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MOD_REG_FLD(DISPC_IRQENABLE, 0x7fff, irq_mask);
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enable_lcd_clocks(0);
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}
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EXPORT_SYMBOL(omap_dispc_enable_irqs);
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int i;
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void omap_dispc_disable_irqs(int irq_mask)
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{
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enable_lcd_clocks(1);
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dispc.enabled_irqs &= ~irq_mask;
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irq_mask &= ~DISPC_IRQ_MASK_ERROR;
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MOD_REG_FLD(DISPC_IRQENABLE, 0x7fff, irq_mask);
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enable_lcd_clocks(0);
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}
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EXPORT_SYMBOL(omap_dispc_disable_irqs);
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for (i = 0; i < MAX_IRQ_HANDLERS; i++) {
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if (dispc.irq_handlers[i].callback == callback &&
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dispc.irq_handlers[i].data == data) {
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dispc.irq_handlers[i].irq_mask = 0;
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dispc.irq_handlers[i].callback = NULL;
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dispc.irq_handlers[i].data = NULL;
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recalc_irq_mask();
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return;
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}
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}
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void omap_dispc_free_irq(void)
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{
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enable_lcd_clocks(1);
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omap_dispc_disable_irqs(DISPC_IRQ_MASK_ALL);
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dispc.irq_callback = NULL;
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dispc.irq_callback_data = NULL;
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enable_lcd_clocks(0);
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BUG();
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}
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EXPORT_SYMBOL(omap_dispc_free_irq);
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static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
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{
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u32 stat;
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int i = 0;
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enable_lcd_clocks(1);
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@ -873,8 +891,12 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
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}
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}
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if ((stat & dispc.enabled_irqs) && dispc.irq_callback)
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dispc.irq_callback(dispc.irq_callback_data);
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for (i = 0; i < MAX_IRQ_HANDLERS; i++) {
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if (unlikely(dispc.irq_handlers[i].callback &&
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(stat & dispc.irq_handlers[i].irq_mask)))
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dispc.irq_handlers[i].callback(
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dispc.irq_handlers[i].data);
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}
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dispc_write_reg(DISPC_IRQSTATUS, stat);
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@ -1410,8 +1432,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
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l = dispc_read_reg(DISPC_IRQSTATUS);
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dispc_write_reg(DISPC_IRQSTATUS, l);
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/* Enable those that we handle always */
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omap_dispc_enable_irqs(DISPC_IRQ_FRAMEMASK);
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recalc_irq_mask();
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if ((r = request_irq(INT_24XX_DSS_IRQ, omap_dispc_irq_handler,
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0, MODULE_NAME, fbdev)) < 0) {
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@ -37,9 +37,10 @@ extern void omap_dispc_set_lcd_size(int width, int height);
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extern void omap_dispc_enable_lcd_out(int enable);
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extern void omap_dispc_enable_digit_out(int enable);
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extern int omap_dispc_request_irq(void (*callback)(void *data), void *data);
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extern void omap_dispc_free_irq(void);
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extern int omap_dispc_request_irq(unsigned long irq_mask,
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void (*callback)(void *data), void *data);
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extern void omap_dispc_free_irq(unsigned long irq_mask,
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void (*callback)(void *data), void *data);
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extern const struct lcd_ctrl omap2_int_ctrl;
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#endif
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@ -57,6 +57,7 @@
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#define DISPC_BASE 0x48050400
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#define DISPC_CONTROL 0x0040
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#define DISPC_IRQ_FRAMEMASK 0x0001
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static struct {
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void __iomem *base;
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@ -553,7 +554,9 @@ static int rfbi_init(struct omapfb_device *fbdev)
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l = (0x01 << 2);
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rfbi_write_reg(RFBI_CONTROL, l);
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if ((r = omap_dispc_request_irq(rfbi_dma_callback, NULL)) < 0) {
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r = omap_dispc_request_irq(DISPC_IRQ_FRAMEMASK, rfbi_dma_callback,
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NULL);
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if (r < 0) {
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dev_err(fbdev->dev, "can't get DISPC irq\n");
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rfbi_enable_clocks(0);
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return r;
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@ -570,7 +573,7 @@ static int rfbi_init(struct omapfb_device *fbdev)
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static void rfbi_cleanup(void)
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{
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omap_dispc_free_irq();
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omap_dispc_free_irq(DISPC_IRQ_FRAMEMASK, rfbi_dma_callback, NULL);
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rfbi_put_clocks();
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iounmap(rfbi.base);
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}
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