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[ARM] 3637/1: S3C24XX: Add mpll clock, and set as fclk parent

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Patch from Ben Dooks

Update the clocks with the MPLL clock, and
use it as the parent. Also export these to
the rest of arch/arm/mach-s3c2410

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks 2006-06-24 21:21:29 +01:00 committed by Russell King
parent 3434d9d9fc
commit 513846f828
2 changed files with 13 additions and 2 deletions
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13
arch/arm/mach-s3c2410/clock.c
View File

@ -213,7 +213,7 @@ EXPORT_SYMBOL(clk_set_parent);
/* base clocks */
static struct clk clk_xtal = {
struct clk clk_xtal = {
.name = "xtal",
.id = -1,
.rate = 0,
@ -221,6 +221,11 @@ static struct clk clk_xtal = {
.ctrlbit = 0,
};
struct clk clk_mpll = {
.name = "mpll",
.id = -1,
};
struct clk clk_upll = {
.name = "upll",
.id = -1,
@ -232,7 +237,7 @@ struct clk clk_f = {
.name = "fclk",
.id = -1,
.rate = 0,
.parent = NULL,
.parent = &clk_mpll,
.ctrlbit = 0,
};
@ -413,6 +418,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
clk_xtal.rate = xtal;
clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
clk_mpll.rate = fclk;
clk_h.rate = hclk;
clk_p.rate = pclk;
clk_f.rate = fclk;
@ -424,6 +430,9 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
if (s3c24xx_register_clock(&clk_xtal) < 0)
printk(KERN_ERR "failed to register master xtal\n");
if (s3c24xx_register_clock(&clk_mpll) < 0)
printk(KERN_ERR "failed to register mpll clock\n");
if (s3c24xx_register_clock(&clk_upll) < 0)
printk(KERN_ERR "failed to register upll clock\n");

2
arch/arm/mach-s3c2410/clock.h
View File

@ -42,7 +42,9 @@ extern struct clk clk_usb_bus;
extern struct clk clk_f;
extern struct clk clk_h;
extern struct clk clk_p;
extern struct clk clk_mpll;
extern struct clk clk_upll;
extern struct clk clk_xtal;
/* exports for arch/arm/mach-s3c2410
*