MIPS: BCM63xx: Use irq_desc as argument for (un)mask
In preparation for applying affinity, use the irq descriptor as the argument for (un)mask. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -31,8 +31,8 @@ static int is_ext_irq_cascaded;
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static unsigned int ext_irq_count;
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static unsigned int ext_irq_start, ext_irq_end;
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static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
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static void (*internal_irq_mask)(unsigned int irq);
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static void (*internal_irq_unmask)(unsigned int irq);
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static void (*internal_irq_mask)(struct irq_data *d);
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static void (*internal_irq_unmask)(struct irq_data *d);
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static inline u32 get_ext_irq_perf_reg(int irq)
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@ -96,9 +96,10 @@ void __dispatch_internal_##width(int cpu) \
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} \
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} \
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\
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static void __internal_irq_mask_##width(unsigned int irq) \
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static void __internal_irq_mask_##width(struct irq_data *d) \
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{ \
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u32 val; \
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unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
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unsigned reg = (irq / 32) ^ (width/32 - 1); \
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unsigned bit = irq & 0x1f; \
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unsigned long flags; \
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@ -116,9 +117,10 @@ static void __internal_irq_mask_##width(unsigned int irq) \
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spin_unlock_irqrestore(&ipic_lock, flags); \
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} \
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\
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static void __internal_irq_unmask_##width(unsigned int irq) \
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static void __internal_irq_unmask_##width(struct irq_data *d) \
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{ \
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u32 val; \
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unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
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unsigned reg = (irq / 32) ^ (width/32 - 1); \
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unsigned bit = irq & 0x1f; \
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unsigned long flags; \
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@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
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*/
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static void bcm63xx_internal_irq_mask(struct irq_data *d)
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{
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internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
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internal_irq_mask(d);
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}
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static void bcm63xx_internal_irq_unmask(struct irq_data *d)
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{
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internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE);
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internal_irq_unmask(d);
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}
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/*
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@ -213,7 +215,7 @@ static void bcm63xx_external_irq_mask(struct irq_data *d)
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spin_unlock_irqrestore(&epic_lock, flags);
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if (is_ext_irq_cascaded)
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internal_irq_mask(irq + ext_irq_start);
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internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
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}
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static void bcm63xx_external_irq_unmask(struct irq_data *d)
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@ -235,7 +237,7 @@ static void bcm63xx_external_irq_unmask(struct irq_data *d)
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spin_unlock_irqrestore(&epic_lock, flags);
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if (is_ext_irq_cascaded)
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internal_irq_unmask(irq + ext_irq_start);
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internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
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}
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static void bcm63xx_external_irq_clear(struct irq_data *d)
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