gpio/omap: use pm-runtime framework
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put() for enabling/disabling clocks appropriately. Remove syscore_ops and instead use SET_RUNTIME_PM_OPS macro. There is no more need to call omap_device_disable_idle_on_suspend since driver is PM runtime adapted now. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -136,8 +136,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
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return PTR_ERR(pdev);
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}
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omap_device_disable_idle_on_suspend(pdev);
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return 0;
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}
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@ -21,6 +21,7 @@
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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@ -483,8 +484,14 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
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struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
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unsigned long flags;
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spin_lock_irqsave(&bank->lock, flags);
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/*
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* If this is the first gpio_request for the bank,
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* enable the bank module.
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*/
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if (!bank->mod_usage)
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pm_runtime_get_sync(bank->dev);
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spin_lock_irqsave(&bank->lock, flags);
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/* Set trigger to none. You need to enable the desired trigger with
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* request_irq() or set_irq_type().
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*/
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@ -540,6 +547,13 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
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_reset_gpio(bank, bank->chip.base + offset);
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spin_unlock_irqrestore(&bank->lock, flags);
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/*
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* If this is the last gpio to be freed in the bank,
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* disable the bank module.
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*/
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if (!bank->mod_usage)
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pm_runtime_put(bank->dev);
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}
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/*
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@ -565,6 +579,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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bank = irq_get_handler_data(irq);
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isr_reg = bank->base + bank->regs->irqstatus;
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pm_runtime_get_sync(bank->dev);
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if (WARN_ON(!isr_reg))
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goto exit;
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@ -625,6 +640,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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exit:
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if (!unmasked)
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chained_irq_exit(chip, desc);
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pm_runtime_put(bank->dev);
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}
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static void gpio_irq_shutdown(struct irq_data *d)
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@ -1037,6 +1053,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
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}
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pm_runtime_enable(bank->dev);
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pm_runtime_irq_safe(bank->dev);
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pm_runtime_get_sync(bank->dev);
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if (bank->is_mpuio)
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@ -1046,6 +1063,8 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
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omap_gpio_chip_init(bank);
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omap_gpio_show_rev(bank);
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pm_runtime_put(bank->dev);
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list_add_tail(&bank->node, &omap_gpio_list);
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return ret;
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@ -1056,7 +1075,10 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
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return ret;
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}
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static int omap_gpio_suspend(void)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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#if defined(CONFIG_PM_SLEEP)
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static int omap_gpio_suspend(struct device *dev)
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{
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struct gpio_bank *bank;
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@ -1080,7 +1102,7 @@ static int omap_gpio_suspend(void)
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return 0;
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}
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static void omap_gpio_resume(void)
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static int omap_gpio_resume(struct device *dev)
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{
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struct gpio_bank *bank;
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@ -1089,21 +1111,17 @@ static void omap_gpio_resume(void)
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unsigned long flags;
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if (!bank->regs->wkup_en)
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return;
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return 0;
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spin_lock_irqsave(&bank->lock, flags);
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_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
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_gpio_rmw(base, bank->regs->wkup_en, bank->saved_wakeup, 1);
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spin_unlock_irqrestore(&bank->lock, flags);
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}
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return 0;
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}
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static struct syscore_ops omap_gpio_syscore_ops = {
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.suspend = omap_gpio_suspend,
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.resume = omap_gpio_resume,
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};
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#ifdef CONFIG_ARCH_OMAP2PLUS
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#endif /* CONFIG_PM_SLEEP */
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static void omap_gpio_save_context(struct gpio_bank *bank);
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static void omap_gpio_restore_context(struct gpio_bank *bank);
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@ -1145,11 +1163,15 @@ void omap2_gpio_prepare_for_idle(int off_mode)
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__raw_writel(l2, bank->base + bank->regs->risingdetect);
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save_gpio_context:
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(bank->dev);
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omap_gpio_save_context(bank);
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if (!pm_runtime_suspended(bank->dev))
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pm_runtime_put(bank->dev);
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}
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}
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@ -1168,6 +1190,9 @@ void omap2_gpio_resume_after_idle(void)
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for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
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clk_enable(bank->dbck);
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if (pm_runtime_suspended(bank->dev))
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pm_runtime_get_sync(bank->dev);
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if (bank->get_context_loss_count) {
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context_lost_cnt_after =
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bank->get_context_loss_count(bank->dev);
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@ -1274,12 +1299,20 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
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bank->base + bank->regs->fallingdetect);
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__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
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}
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#else
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#define omap_gpio_suspend NULL
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#define omap_gpio_resume NULL
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#endif
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static const struct dev_pm_ops gpio_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
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};
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static struct platform_driver omap_gpio_driver = {
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.probe = omap_gpio_probe,
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.driver = {
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.name = "omap_gpio",
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.pm = &gpio_pm_ops,
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},
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};
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@ -1293,16 +1326,3 @@ static int __init omap_gpio_drv_reg(void)
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return platform_driver_register(&omap_gpio_driver);
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}
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postcore_initcall(omap_gpio_drv_reg);
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static int __init omap_gpio_sysinit(void)
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{
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
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if (cpu_is_omap16xx() || cpu_class_is_omap2())
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register_syscore_ops(&omap_gpio_syscore_ops);
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#endif
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return 0;
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}
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arch_initcall(omap_gpio_sysinit);
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