Samsung 2nd fixes for v4.1
- fix second S2R on exynos4412 based Trats2, Odroid U3 boards which happened after enabling L2$ and caused by commit13cfa6c4f7("ARM: EXYNOS: Fix CPU idle clock down after CPU off") And replace the soc_is_exynosxxx() macro with of_compatible_xxx - fix dereference of ERR_PTR of of_genpd_get_from_provider() - fix suspend problem on old DT machines to skip the initialization suspend and caused by commit8b283c0254("ARM: exynos4/5: convert pmu wakeup to stacked domains") - add keep-power-in-suspend for Peach Boards to support S2R and has been missed in previous pull-request for fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJVVBCOAAoJEA0Cl+kVi2xqeDoP/27tWRCwy7ZUkhjZ90pHwJYg SIBBGO/Ko4Sts7OqeBHDczHdjhFPlqRLuoKduQrJpHOkcCa2+k9laILC4edTaYJB mTJgUKiJvUPmkTFNkxPq4nf/OOsavpvTyS7Voyv2zDPxwXyY56ml3FEWNM17tQQv 9MdvdMeIga3OdL6/a77HPYYtxmYMCSlJxXOyxE7ReSmIVQa/udRKlEZ7j1B/bt2t c8wVbViXMNuNXsUK/yPgz7F8fnmmzX1HyPqUow6Jx1L7jOltq6fCAa14MiRyAGyH r3GlrmkXvFNtaZnh/Oe/6em3KPkuj7EvCs5paXuFzPcwGEnaS7k5WVUgRuPZXl8A sUEkc7aWUVWScjXsNNmVOZMOC8ZMVLHXYY7ArdEn/V/dZHJzUrulhvpmDHjkA7tP oep2eT3mti1BZqhZ+6C8uD2W0s0HD5Gi+oTvBOvxZbKmJpHOSKFa6zxOwWwRAAJ5 opOPAZxZdgc0BcdcheiCindEMKO0ldzHGTJUsOY5/zXCmigDZUYCtEQRNV7UUHFF sR4b/S92B7y2HVzCLl9Ns6K1HHXU2/VefJmZ945GTL5YedkvTgECi/OeA1taGU9Y fDR0NaxS4rxFhGp5T8JVkweT4ahTGnXyEwHfl3CzSAFq3tHHeD1KqD+D92JUaW14 26jDOQZOa04zXAJzDsTR =r1wn -----END PGP SIGNATURE----- Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes Merge "Samsung 2nd fixes for v4.1" from Kukjin Kim: - fix second S2R on exynos4412 based Trats2, Odroid U3 boards which happened after enabling L2$ and caused by commit13cfa6c4f7("ARM: EXYNOS: Fix CPU idle clock down after CPU off") And replace the soc_is_exynosxxx() macro with of_compatible_xxx - fix dereference of ERR_PTR of of_genpd_get_from_provider() - fix suspend problem on old DT machines to skip the initialization suspend and caused by commit8b283c0254("ARM: exynos4/5: convert pmu wakeup to stacked domains") - add keep-power-in-suspend for Peach Boards to support S2R and has been missed in previous pull-request for fixes * tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Use of_machine_is_compatible instead of soc_is_exynos4 ARM: EXYNOS: Fix failed second suspend on Exynos4 ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider ARM: EXYNOS: Don't try to initialize suspend on old DT ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards
This commit is contained in:
Arnd Bergmann
commit
56523eefaa
@ -711,6 +711,7 @@ &mmc_1 {
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num-slots = <1>;
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broken-cd;
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cap-sdio-irq;
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keep-power-in-suspend;
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card-detect-delay = <200>;
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clock-frequency = <400000000>;
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samsung,dw-mshc-ciu-div = <1>;
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@ -674,6 +674,7 @@ &mmc_1 {
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num-slots = <1>;
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broken-cd;
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cap-sdio-irq;
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keep-power-in-suspend;
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card-detect-delay = <200>;
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clock-frequency = <400000000>;
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samsung,dw-mshc-ciu-div = <1>;
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@ -159,6 +159,8 @@ extern void exynos_enter_aftr(void);
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extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
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extern void exynos_set_delayed_reset_assertion(bool enable);
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extern void s5p_init_cpu(void __iomem *cpuid_addr);
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extern unsigned int samsung_rev(void);
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extern void __iomem *cpu_boot_reg_base(void);
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@ -166,6 +166,33 @@ static void __init exynos_init_io(void)
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exynos_map_io();
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}
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/*
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* Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
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* and suspend.
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*
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* This is necessary only on Exynos4 SoCs. When system is running
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* USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
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* feature could properly detect global idle state when secondary CPU is
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* powered down.
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*
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* However this should not be set when such system is going into suspend.
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*/
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void exynos_set_delayed_reset_assertion(bool enable)
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{
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if (of_machine_is_compatible("samsung,exynos4")) {
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unsigned int tmp, core_id;
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for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
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tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
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if (enable)
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tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
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else
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tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
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pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
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}
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}
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}
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/*
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* Apparently, these SoCs are not able to wake-up from suspend using
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* the PMU. Too bad. Should they suddenly become capable of such a
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@ -34,30 +34,6 @@
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extern void exynos4_secondary_startup(void);
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/*
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* Set or clear the USE_DELAYED_RESET_ASSERTION option, set on Exynos4 SoCs
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* during hot-(un)plugging CPUx.
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*
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* The feature can be cleared safely during first boot of secondary CPU.
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*
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* Exynos4 SoCs require setting USE_DELAYED_RESET_ASSERTION during powering
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* down a CPU so the CPU idle clock down feature could properly detect global
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* idle state when CPUx is off.
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*/
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static void exynos_set_delayed_reset_assertion(u32 core_id, bool enable)
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{
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if (soc_is_exynos4()) {
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unsigned int tmp;
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tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
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if (enable)
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tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
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else
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tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
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pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static inline void cpu_leave_lowpower(u32 core_id)
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{
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@ -73,8 +49,6 @@ static inline void cpu_leave_lowpower(u32 core_id)
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: "=&r" (v)
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: "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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exynos_set_delayed_reset_assertion(core_id, false);
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}
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static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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@ -87,14 +61,6 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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/* Turn the CPU off on next WFI instruction. */
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exynos_cpu_power_down(core_id);
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/*
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* Exynos4 SoCs require setting
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* USE_DELAYED_RESET_ASSERTION so the CPU idle
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* clock down feature could properly detect
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* global idle state when CPUx is off.
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*/
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exynos_set_delayed_reset_assertion(core_id, true);
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wfi();
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if (pen_release == core_id) {
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@ -371,9 +337,6 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
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udelay(10);
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}
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/* No harm if this is called during first boot of secondary CPU */
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exynos_set_delayed_reset_assertion(core_id, false);
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/*
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* now the secondary core is starting up let it run its
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* calibrations, then wait for it to finish
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@ -420,6 +383,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
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exynos_sysram_init();
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exynos_set_delayed_reset_assertion(true);
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if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
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scu_enable(scu_base_addr());
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@ -188,7 +188,7 @@ static __init int exynos4_pm_init_power_domain(void)
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args.np = np;
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args.args_count = 0;
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child_domain = of_genpd_get_from_provider(&args);
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if (!child_domain)
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if (IS_ERR(child_domain))
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continue;
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if (of_parse_phandle_with_args(np, "power-domains",
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@ -196,7 +196,7 @@ static __init int exynos4_pm_init_power_domain(void)
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continue;
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parent_domain = of_genpd_get_from_provider(&args);
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if (!parent_domain)
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if (IS_ERR(parent_domain))
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continue;
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if (pm_genpd_add_subdomain(parent_domain, child_domain))
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@ -342,6 +342,8 @@ static void exynos_pm_enter_sleep_mode(void)
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static void exynos_pm_prepare(void)
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{
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exynos_set_delayed_reset_assertion(false);
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/* Set wake-up mask registers */
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exynos_pm_set_wakeup_mask();
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@ -482,6 +484,7 @@ static void exynos_pm_resume(void)
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/* Clear SLEEP mode set in INFORM1 */
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pmu_raw_writel(0x0, S5P_INFORM1);
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exynos_set_delayed_reset_assertion(true);
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}
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static void exynos3250_pm_resume(void)
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@ -723,8 +726,10 @@ void __init exynos_pm_init(void)
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return;
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}
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if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL)))
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if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
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pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
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return;
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}
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pm_data = (const struct exynos_pm_data *) match->data;
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