ASoC: stm32: sai: Add synchronization support
Add Synchronization support for STM32 SAI. Signed-off-by: olivier moysan <olivier.moysan@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
47a8907d7c
commit
5914d285f6
@ -16,6 +16,7 @@
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* details.
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*/
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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@ -27,6 +28,16 @@
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#include "stm32_sai.h"
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static LIST_HEAD(sync_providers);
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static DEFINE_MUTEX(sync_mutex);
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struct sync_provider {
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struct list_head link;
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struct device_node *node;
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int (*sync_conf)(void *data, int synco);
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void *data;
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};
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static const struct stm32_sai_conf stm32_sai_conf_f4 = {
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.version = SAI_STM32F4,
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};
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@ -41,23 +52,143 @@ static const struct of_device_id stm32_sai_ids[] = {
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{}
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};
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static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
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{
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int ret;
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/* Enable peripheral clock to allow GCR register access */
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ret = clk_prepare_enable(sai->pclk);
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if (ret) {
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dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
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return ret;
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}
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writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);
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clk_disable_unprepare(sai->pclk);
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return 0;
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}
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static int stm32_sai_sync_conf_provider(void *data, int synco)
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{
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struct stm32_sai_data *sai = (struct stm32_sai_data *)data;
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u32 prev_synco;
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int ret;
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/* Enable peripheral clock to allow GCR register access */
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ret = clk_prepare_enable(sai->pclk);
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if (ret) {
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dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
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return ret;
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}
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dev_dbg(&sai->pdev->dev, "Set %s%s as synchro provider\n",
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sai->pdev->dev.of_node->name,
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synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
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prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
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if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
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dev_err(&sai->pdev->dev, "%s%s already set as sync provider\n",
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sai->pdev->dev.of_node->name,
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prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
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clk_disable_unprepare(sai->pclk);
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return -EINVAL;
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}
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writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);
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clk_disable_unprepare(sai->pclk);
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return 0;
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}
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static int stm32_sai_set_sync_provider(struct device_node *np, int synco)
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{
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struct sync_provider *provider;
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int ret;
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mutex_lock(&sync_mutex);
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list_for_each_entry(provider, &sync_providers, link) {
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if (provider->node == np) {
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ret = provider->sync_conf(provider->data, synco);
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mutex_unlock(&sync_mutex);
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return ret;
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}
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}
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mutex_unlock(&sync_mutex);
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/* SAI sync provider not found */
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return -ENODEV;
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}
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static int stm32_sai_set_sync(struct stm32_sai_data *sai,
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struct device_node *np_provider,
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int synco, int synci)
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{
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int ret;
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/* Configure sync client */
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stm32_sai_sync_conf_client(sai, synci);
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/* Configure sync provider */
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ret = stm32_sai_set_sync_provider(np_provider, synco);
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return ret;
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}
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static int stm32_sai_sync_add_provider(struct platform_device *pdev,
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void *data)
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{
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struct sync_provider *sp;
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sp = devm_kzalloc(&pdev->dev, sizeof(*sp), GFP_KERNEL);
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if (!sp)
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return -ENOMEM;
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sp->node = of_node_get(pdev->dev.of_node);
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sp->data = data;
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sp->sync_conf = &stm32_sai_sync_conf_provider;
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mutex_lock(&sync_mutex);
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list_add(&sp->link, &sync_providers);
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mutex_unlock(&sync_mutex);
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return 0;
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}
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static void stm32_sai_sync_del_provider(struct device_node *np)
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{
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struct sync_provider *sp;
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mutex_lock(&sync_mutex);
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list_for_each_entry(sp, &sync_providers, link) {
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if (sp->node == np) {
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list_del(&sp->link);
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of_node_put(sp->node);
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break;
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}
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}
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mutex_unlock(&sync_mutex);
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}
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static int stm32_sai_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct stm32_sai_data *sai;
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struct reset_control *rst;
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struct resource *res;
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void __iomem *base;
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const struct of_device_id *of_id;
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int ret;
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sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
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if (!sai)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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sai->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(sai->base))
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return PTR_ERR(sai->base);
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of_id = of_match_device(stm32_sai_ids, &pdev->dev);
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if (of_id)
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@ -65,6 +196,14 @@ static int stm32_sai_probe(struct platform_device *pdev)
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else
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return -EINVAL;
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if (!STM_SAI_IS_F4(sai)) {
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sai->pclk = devm_clk_get(&pdev->dev, "pclk");
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if (IS_ERR(sai->pclk)) {
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dev_err(&pdev->dev, "missing bus clock pclk\n");
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return PTR_ERR(sai->pclk);
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}
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}
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sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
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if (IS_ERR(sai->clk_x8k)) {
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dev_err(&pdev->dev, "missing x8k parent clock\n");
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@ -92,16 +231,27 @@ static int stm32_sai_probe(struct platform_device *pdev)
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reset_control_deassert(rst);
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}
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ret = stm32_sai_sync_add_provider(pdev, sai);
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if (ret < 0)
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return ret;
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sai->set_sync = &stm32_sai_set_sync;
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sai->pdev = pdev;
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platform_set_drvdata(pdev, sai);
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return of_platform_populate(np, NULL, NULL, &pdev->dev);
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ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
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if (ret < 0)
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stm32_sai_sync_del_provider(np);
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return ret;
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}
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static int stm32_sai_remove(struct platform_device *pdev)
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{
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of_platform_depopulate(&pdev->dev);
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stm32_sai_sync_del_provider(pdev->dev.of_node);
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return 0;
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}
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@ -16,9 +16,11 @@
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* details.
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*/
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#include <linux/bitfield.h>
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/******************** SAI Register Map **************************************/
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/* common register */
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/* Global configuration register */
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#define STM_SAI_GCR 0x00
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/* Sub-block A&B registers offsets, relative to A&B sub-block addresses */
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@ -37,12 +39,13 @@
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/******************** Bit definition for SAI_GCR register *******************/
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#define SAI_GCR_SYNCIN_SHIFT 0
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#define SAI_GCR_SYNCIN_WDTH 2
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#define SAI_GCR_SYNCIN_MASK GENMASK(1, SAI_GCR_SYNCIN_SHIFT)
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#define SAI_GCR_SYNCIN_SET(x) ((x) << SAI_GCR_SYNCIN_SHIFT)
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#define SAI_GCR_SYNCIN_MAX FIELD_GET(SAI_GCR_SYNCIN_MASK,\
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SAI_GCR_SYNCIN_MASK)
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#define SAI_GCR_SYNCOUT_SHIFT 4
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#define SAI_GCR_SYNCOUT_MASK GENMASK(5, SAI_GCR_SYNCOUT_SHIFT)
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#define SAI_GCR_SYNCOUT_SET(x) ((x) << SAI_GCR_SYNCOUT_SHIFT)
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/******************* Bit definition for SAI_XCR1 register *******************/
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#define SAI_XCR1_RX_TX_SHIFT 0
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@ -231,6 +234,12 @@
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#define STM_SAI_IS_F4(ip) ((ip)->conf->version == SAI_STM32F4)
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#define STM_SAI_IS_H7(ip) ((ip)->conf->version == SAI_STM32H7)
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enum stm32_sai_syncout {
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STM_SAI_SYNC_OUT_NONE,
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STM_SAI_SYNC_OUT_A,
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STM_SAI_SYNC_OUT_B,
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};
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enum stm32_sai_version {
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SAI_STM32F4,
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SAI_STM32H7
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@ -247,15 +256,22 @@ struct stm32_sai_conf {
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/**
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* struct stm32_sai_data - private data of SAI instance driver
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* @pdev: device data pointer
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* @base: common register bank virtual base address
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* @pclk: SAI bus clock
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* @clk_x8k: SAI parent clock for sampling frequencies multiple of 8kHz
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* @clk_x11k: SAI parent clock for sampling frequencies multiple of 11kHz
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* @version: SOC version
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* @irq: SAI interrupt line
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* @set_sync: pointer to synchro mode configuration callback
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*/
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struct stm32_sai_data {
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struct platform_device *pdev;
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void __iomem *base;
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struct clk *pclk;
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struct clk *clk_x8k;
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struct clk *clk_x11k;
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struct stm32_sai_conf *conf;
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int irq;
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int (*set_sync)(struct stm32_sai_data *sai,
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struct device_node *np_provider, int synco, int synci);
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};
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@ -55,6 +55,12 @@
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#define STM_SAI_IS_SUB_B(x) ((x)->id == STM_SAI_B_ID)
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#define STM_SAI_BLOCK_NAME(x) (((x)->id == STM_SAI_A_ID) ? "A" : "B")
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#define SAI_SYNC_NONE 0x0
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#define SAI_SYNC_INTERNAL 0x1
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#define SAI_SYNC_EXTERNAL 0x2
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#define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4(sai->pdata))
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/**
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* struct stm32_sai_sub_data - private data of SAI sub block (block A or B)
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* @pdev: device data pointer
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@ -65,6 +71,7 @@
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* @cpu_dai: DAI runtime data pointer
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* @substream: PCM substream data pointer
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* @pdata: SAI block parent data pointer
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* @np_sync_provider: synchronization provider node
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* @sai_ck: kernel clock feeding the SAI clock generator
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* @phys_addr: SAI registers physical base address
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* @mclk_rate: SAI block master clock frequency (Hz). set at init
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@ -73,6 +80,8 @@
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* @master: SAI block mode flag. (true=master, false=slave) set at init
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* @fmt: SAI block format. relevant only for custom protocols. set at init
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* @sync: SAI block synchronization mode. (none, internal or external)
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* @synco: SAI block ext sync source (provider setting). (none, sub-block A/B)
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* @synci: SAI block ext sync source (client setting). (SAI sync provider index)
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* @fs_length: frame synchronization length. depends on protocol settings
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* @slots: rx or tx slot number
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* @slot_width: rx or tx slot width in bits
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@ -88,6 +97,7 @@ struct stm32_sai_sub_data {
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struct snd_soc_dai *cpu_dai;
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struct snd_pcm_substream *substream;
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struct stm32_sai_data *pdata;
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struct device_node *np_sync_provider;
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struct clk *sai_ck;
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dma_addr_t phys_addr;
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unsigned int mclk_rate;
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@ -96,6 +106,8 @@ struct stm32_sai_sub_data {
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bool master;
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int fmt;
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int sync;
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int synco;
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int synci;
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int fs_length;
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int slots;
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int slot_width;
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@ -387,6 +399,14 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
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fmt & SND_SOC_DAIFMT_MASTER_MASK);
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return -EINVAL;
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}
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/* Set slave mode if sub-block is synchronized with another SAI */
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if (sai->sync) {
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dev_dbg(cpu_dai->dev, "Synchronized SAI configured as slave\n");
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cr1 |= SAI_XCR1_SLAVE;
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sai->master = false;
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}
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cr1_mask |= SAI_XCR1_SLAVE;
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/* do not generate master by default */
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@ -749,6 +769,16 @@ static int stm32_sai_dai_probe(struct snd_soc_dai *cpu_dai)
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if (STM_SAI_IS_CAPTURE(sai))
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cr1 |= SAI_XCR1_RX_TX;
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/* Configure synchronization */
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if (sai->sync == SAI_SYNC_EXTERNAL) {
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/* Configure synchro client and provider */
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sai->pdata->set_sync(sai->pdata, sai->np_sync_provider,
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sai->synco, sai->synci);
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}
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cr1_mask |= SAI_XCR1_SYNCEN_MASK;
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cr1 |= SAI_XCR1_SYNCEN_SET(sai->sync);
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return regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1);
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}
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@ -835,6 +865,8 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
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struct device_node *np = pdev->dev.of_node;
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struct resource *res;
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void __iomem *base;
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struct of_phandle_args args;
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int ret;
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if (!np)
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return -ENODEV;
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@ -868,6 +900,69 @@ static int stm32_sai_sub_parse_of(struct platform_device *pdev,
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return -EINVAL;
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}
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/* Get synchronization property */
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args.np = NULL;
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ret = of_parse_phandle_with_fixed_args(np, "st,sync", 1, 0, &args);
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if (ret < 0 && ret != -ENOENT) {
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dev_err(&pdev->dev, "Failed to get st,sync property\n");
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return ret;
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}
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sai->sync = SAI_SYNC_NONE;
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if (args.np) {
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if (args.np == np) {
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dev_err(&pdev->dev, "%s sync own reference\n",
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np->name);
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of_node_put(args.np);
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return -EINVAL;
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}
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sai->np_sync_provider = of_get_parent(args.np);
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if (!sai->np_sync_provider) {
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dev_err(&pdev->dev, "%s parent node not found\n",
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np->name);
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of_node_put(args.np);
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return -ENODEV;
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}
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sai->sync = SAI_SYNC_INTERNAL;
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if (sai->np_sync_provider != sai->pdata->pdev->dev.of_node) {
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if (!STM_SAI_HAS_EXT_SYNC(sai)) {
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dev_err(&pdev->dev,
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"External synchro not supported\n");
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of_node_put(args.np);
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return -EINVAL;
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}
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sai->sync = SAI_SYNC_EXTERNAL;
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sai->synci = args.args[0];
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if (sai->synci < 1 ||
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(sai->synci > (SAI_GCR_SYNCIN_MAX + 1))) {
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dev_err(&pdev->dev, "Wrong SAI index\n");
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of_node_put(args.np);
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return -EINVAL;
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}
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if (of_property_match_string(args.np, "compatible",
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"st,stm32-sai-sub-a") >= 0)
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sai->synco = STM_SAI_SYNC_OUT_A;
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if (of_property_match_string(args.np, "compatible",
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"st,stm32-sai-sub-b") >= 0)
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sai->synco = STM_SAI_SYNC_OUT_B;
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if (!sai->synco) {
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dev_err(&pdev->dev, "Unknown SAI sub-block\n");
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of_node_put(args.np);
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return -EINVAL;
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}
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}
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dev_dbg(&pdev->dev, "%s synchronized with %s\n",
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pdev->name, args.np->full_name);
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}
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of_node_put(args.np);
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sai->sai_ck = devm_clk_get(&pdev->dev, "sai_ck");
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if (IS_ERR(sai->sai_ck)) {
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dev_err(&pdev->dev, "Missing kernel clock sai_ck\n");
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