KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler
Add a handler for reading/writing the guest's view of the ICC_PMR_EL1 register, which is located in the ICH_VMCR_EL2.VPMR field. Tested-by: Alexander Graf <agraf@suse.de> Acked-by: David Daney <david.daney@cavium.com> Acked-by: Christoffer Dall <cdall@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <cdall@linaro.org>
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@ -884,6 +884,27 @@ static void __hyp_text __vgic_v3_read_hppir(struct kvm_vcpu *vcpu,
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vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);
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}
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static void __hyp_text __vgic_v3_read_pmr(struct kvm_vcpu *vcpu,
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u32 vmcr, int rt)
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{
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vmcr &= ICH_VMCR_PMR_MASK;
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vmcr >>= ICH_VMCR_PMR_SHIFT;
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vcpu_set_reg(vcpu, rt, vmcr);
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}
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static void __hyp_text __vgic_v3_write_pmr(struct kvm_vcpu *vcpu,
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u32 vmcr, int rt)
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{
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u32 val = vcpu_get_reg(vcpu, rt);
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val <<= ICH_VMCR_PMR_SHIFT;
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val &= ICH_VMCR_PMR_MASK;
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vmcr &= ~ICH_VMCR_PMR_MASK;
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vmcr |= val;
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write_gicreg(vmcr, ICH_VMCR_EL2);
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}
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static void __hyp_text __vgic_v3_read_rpr(struct kvm_vcpu *vcpu,
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u32 vmcr, int rt)
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{
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@ -1029,6 +1050,12 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
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else
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fn = __vgic_v3_write_ctlr;
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break;
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case SYS_ICC_PMR_EL1:
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if (is_read)
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fn = __vgic_v3_read_pmr;
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else
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fn = __vgic_v3_write_pmr;
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break;
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default:
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return 0;
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}
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