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powerpc: FPGA support for GE Fanuc SBC610

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Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC
MPC8641D).

This patch adds support for the registers held in the devices main FPGA,
exposing extra information about the revision of the board through cpuinfo.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Martyn Welch 2008-10-13 16:16:45 +01:00 committed by Kumar Gala
parent d6c3db83c5
commit 6675847ea4
2 changed files with 44 additions and 0 deletions
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4
arch/powerpc/boot/dts/gef_sbc610.dts
View File

@ -84,6 +84,10 @@ localbus@fef05000 {
6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
fpga@4,0 {
compatible = "gef,fpga-regs";
reg = <0x4 0x0 0x40>;
};
gef_pic: pic@4,4000 { gef_pic: pic@4,4000 {
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-controller; interrupt-controller;

40
arch/powerpc/platforms/86xx/gef_sbc610.c
View File

@ -73,6 +73,7 @@ static void __init gef_sbc610_init_irq(void)
static void __init gef_sbc610_setup_arch(void) static void __init gef_sbc610_setup_arch(void)
{ {
struct device_node *regs;
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
struct device_node *np; struct device_node *np;
@ -86,8 +87,43 @@ static void __init gef_sbc610_setup_arch(void)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
mpc86xx_smp_init(); mpc86xx_smp_init();
#endif #endif
/* Remap basic board registers */
regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
if (regs) {
sbc610_regs = of_iomap(regs, 0);
if (sbc610_regs == NULL)
printk(KERN_WARNING "Unable to map board registers\n");
of_node_put(regs);
}
} }
/* Return the PCB revision */
static unsigned int gef_sbc610_get_pcb_rev(void)
{
unsigned int reg;
reg = ioread32(sbc610_regs);
return (reg >> 8) & 0xff;
}
/* Return the board (software) revision */
static unsigned int gef_sbc610_get_board_rev(void)
{
unsigned int reg;
reg = ioread32(sbc610_regs);
return (reg >> 16) & 0xff;
}
/* Return the FPGA revision */
static unsigned int gef_sbc610_get_fpga_rev(void)
{
unsigned int reg;
reg = ioread32(sbc610_regs);
return (reg >> 24) & 0xf;
}
static void gef_sbc610_show_cpuinfo(struct seq_file *m) static void gef_sbc610_show_cpuinfo(struct seq_file *m)
{ {
@ -96,6 +132,10 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
('A' + gef_sbc610_get_board_rev() - 1));
seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
seq_printf(m, "SVR\t\t: 0x%x\n", svid); seq_printf(m, "SVR\t\t: 0x%x\n", svid);
seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
} }