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mfd: arizona: Add support for WM8998 and WM1814

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Signed-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Richard Fitzgerald 2015-07-03 16:16:35 +01:00 committed by Lee Jones
parent bc00d68f2f
commit 6887b042c5
10 changed files with 1945 additions and 8 deletions
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6
drivers/mfd/Kconfig
View File

@ -1379,6 +1379,12 @@ config MFD_WM8997
help
Support for Wolfson Microelectronics WM8997 low power audio SoC
config MFD_WM8998
bool "Wolfson Microelectronics WM8998"
depends on MFD_ARIZONA
help
Support for Wolfson Microelectronics WM8998 low power audio SoC
config MFD_WM8400
bool "Wolfson Microelectronics WM8400"
select MFD_CORE

3
drivers/mfd/Makefile
View File

@ -48,6 +48,9 @@ endif
ifeq ($(CONFIG_MFD_WM8997),y)
obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o
endif
ifeq ($(CONFIG_MFD_WM8998),y)
obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o
endif
obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
wm831x-objs += wm831x-auxadc.o

105
drivers/mfd/arizona-core.c
View File

@ -146,17 +146,31 @@ static irqreturn_t arizona_underclocked(int irq, void *data)
static irqreturn_t arizona_overclocked(int irq, void *data)
{
struct arizona *arizona = data;
unsigned int val[2];
unsigned int val[3];
int ret;
ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
&val[0], 2);
&val[0], 3);
if (ret != 0) {
dev_err(arizona->dev, "Failed to read overclock status: %d\n",
ret);
return IRQ_NONE;
}
switch (arizona->type) {
case WM8998:
case WM1814:
/* Some bits are shifted on WM8998,
* rearrange to match the standard bit layout
*/
val[0] = ((val[0] & 0x60e0) >> 1) |
((val[0] & 0x1e00) >> 2) |
(val[0] & 0x000f);
break;
default:
break;
}
if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
dev_err(arizona->dev, "PWM overclocked\n");
if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
@ -201,6 +215,9 @@ static irqreturn_t arizona_overclocked(int irq, void *data)
if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
dev_err(arizona->dev, "ISRC1 overclocked\n");
if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
dev_err(arizona->dev, "SPDIF overclocked\n");
return IRQ_HANDLED;
}
@ -806,6 +823,8 @@ const struct of_device_id arizona_of_match[] = {
{ .compatible = "wlf,wm5110", .data = (void *)WM5110 },
{ .compatible = "wlf,wm8280", .data = (void *)WM8280 },
{ .compatible = "wlf,wm8997", .data = (void *)WM8997 },
{ .compatible = "wlf,wm8998", .data = (void *)WM8998 },
{ .compatible = "wlf,wm1814", .data = (void *)WM1814 },
{},
};
EXPORT_SYMBOL_GPL(arizona_of_match);
@ -887,11 +906,28 @@ static const struct mfd_cell wm8997_devs[] = {
},
};
static const struct mfd_cell wm8998_devs[] = {
{
.name = "arizona-extcon",
.parent_supplies = wm5102_supplies,
.num_parent_supplies = 1, /* We only need MICVDD */
},
{ .name = "arizona-gpio" },
{ .name = "arizona-haptics" },
{ .name = "arizona-pwm" },
{
.name = "wm8998-codec",
.parent_supplies = wm5102_supplies,
.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
},
{ .name = "arizona-micsupp" },
};
int arizona_dev_init(struct arizona *arizona)
{
struct device *dev = arizona->dev;
const char *type_name;
unsigned int reg, val;
unsigned int reg, val, mask;
int (*apply_patch)(struct arizona *) = NULL;
int ret, i;
@ -911,6 +947,8 @@ int arizona_dev_init(struct arizona *arizona)
case WM5110:
case WM8280:
case WM8997:
case WM8998:
case WM1814:
for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
arizona->core_supplies[i].supply
= wm5102_core_supplies[i];
@ -992,6 +1030,7 @@ int arizona_dev_init(struct arizona *arizona)
switch (reg) {
case 0x5102:
case 0x5110:
case 0x6349:
case 0x8997:
break;
default:
@ -1092,6 +1131,27 @@ int arizona_dev_init(struct arizona *arizona)
}
apply_patch = wm8997_patch;
break;
#endif
#ifdef CONFIG_MFD_WM8998
case 0x6349:
switch (arizona->type) {
case WM8998:
type_name = "WM8998";
break;
case WM1814:
type_name = "WM1814";
break;
default:
type_name = "WM8998";
dev_err(arizona->dev, "WM8998 registered as %d\n",
arizona->type);
arizona->type = WM8998;
}
apply_patch = wm8998_patch;
break;
#endif
default:
dev_err(arizona->dev, "Unknown device ID %x\n", reg);
@ -1208,14 +1268,38 @@ int arizona_dev_init(struct arizona *arizona)
<< ARIZONA_IN1_DMIC_SUP_SHIFT;
if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
val |= 1 << ARIZONA_IN1_MODE_SHIFT;
if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
switch (arizona->type) {
case WM8998:
case WM1814:
regmap_update_bits(arizona->regmap,
ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
ARIZONA_IN1L_SRC_SE_MASK,
(arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
<< ARIZONA_IN1L_SRC_SE_SHIFT);
regmap_update_bits(arizona->regmap,
ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
ARIZONA_IN1R_SRC_SE_MASK,
(arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
<< ARIZONA_IN1R_SRC_SE_SHIFT);
mask = ARIZONA_IN1_DMIC_SUP_MASK |
ARIZONA_IN1_MODE_MASK;
break;
default:
if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
mask = ARIZONA_IN1_DMIC_SUP_MASK |
ARIZONA_IN1_MODE_MASK |
ARIZONA_IN1_SINGLE_ENDED_MASK;
break;
}
regmap_update_bits(arizona->regmap,
ARIZONA_IN1L_CONTROL + (i * 8),
ARIZONA_IN1_DMIC_SUP_MASK |
ARIZONA_IN1_MODE_MASK |
ARIZONA_IN1_SINGLE_ENDED_MASK, val);
mask, val);
}
for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
@ -1271,6 +1355,11 @@ int arizona_dev_init(struct arizona *arizona)
ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
break;
case WM8998:
case WM1814:
ret = mfd_add_devices(arizona->dev, -1, wm8998_devs,
ARRAY_SIZE(wm8998_devs), NULL, 0, NULL);
break;
}
if (ret != 0) {

8
drivers/mfd/arizona-i2c.c
View File

@ -52,6 +52,12 @@ static int arizona_i2c_probe(struct i2c_client *i2c,
case WM8997:
regmap_config = &wm8997_i2c_regmap;
break;
#endif
#ifdef CONFIG_MFD_WM8998
case WM8998:
case WM1814:
regmap_config = &wm8998_i2c_regmap;
break;
#endif
default:
dev_err(&i2c->dev, "Unknown device type %ld\n",
@ -90,6 +96,8 @@ static const struct i2c_device_id arizona_i2c_id[] = {
{ "wm5110", WM5110 },
{ "wm8280", WM8280 },
{ "wm8997", WM8997 },
{ "wm8998", WM8998 },
{ "wm1814", WM1814 },
{ }
};
MODULE_DEVICE_TABLE(i2c, arizona_i2c_id);

9
drivers/mfd/arizona-irq.c
View File

@ -234,6 +234,15 @@ int arizona_irq_init(struct arizona *arizona)
arizona->ctrlif_error = false;
break;
#endif
#ifdef CONFIG_MFD_WM8998
case WM8998:
case WM1814:
aod = &wm8998_aod;
irq = &wm8998_irq;
arizona->ctrlif_error = false;
break;
#endif
default:
BUG_ON("Unknown Arizona class device" == NULL);
return -EINVAL;

5
drivers/mfd/arizona.h
View File

@ -27,6 +27,8 @@ extern const struct regmap_config wm5110_spi_regmap;
extern const struct regmap_config wm8997_i2c_regmap;
extern const struct regmap_config wm8998_i2c_regmap;
extern const struct dev_pm_ops arizona_pm_ops;
extern const struct of_device_id arizona_of_match[];
@ -41,6 +43,9 @@ extern const struct regmap_irq_chip wm5110_revd_irq;
extern const struct regmap_irq_chip wm8997_aod;
extern const struct regmap_irq_chip wm8997_irq;
extern struct regmap_irq_chip wm8998_aod;
extern struct regmap_irq_chip wm8998_irq;
int arizona_dev_init(struct arizona *arizona);
int arizona_dev_exit(struct arizona *arizona);
int arizona_irq_init(struct arizona *arizona);

1592
drivers/mfd/wm8998-tables.c Normal file
View File

File diff suppressed because it is too large Load Diff

3
include/linux/mfd/arizona/core.h
View File

@ -25,6 +25,8 @@ enum arizona_type {
WM5110 = 2,
WM8997 = 3,
WM8280 = 4,
WM8998 = 5,
WM1814 = 6,
};
#define ARIZONA_IRQ_GP1 0
@ -165,6 +167,7 @@ static inline int wm5102_patch(struct arizona *arizona)
int wm5110_patch(struct arizona *arizona);
int wm8997_patch(struct arizona *arizona);
int wm8998_patch(struct arizona *arizona);
extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
bool mandatory);

2
include/linux/mfd/arizona/pdata.h
View File

@ -162,6 +162,8 @@ struct arizona_pdata {
/**
* Mode of input structures
* One of the ARIZONA_INMODE_xxx values
* wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4
* wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B
*/
int inmode[ARIZONA_MAX_INPUT];

220
include/linux/mfd/arizona/registers.h
View File

@ -139,6 +139,7 @@
#define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7
#define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8
#define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9
#define ARIZONA_MIC_DETECT_4 0x2AB
#define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3
#define ARIZONA_ISOLATION_CONTROL 0x2CB
#define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3
@ -225,14 +226,18 @@
#define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E
#define ARIZONA_NOISE_GATE_SELECT_6R 0x43F
#define ARIZONA_DRE_ENABLE 0x440
#define ARIZONA_DRE_CONTROL_1 0x441
#define ARIZONA_DRE_CONTROL_2 0x442
#define ARIZONA_DRE_CONTROL_3 0x443
#define ARIZONA_EDRE_ENABLE 0x448
#define ARIZONA_DAC_AEC_CONTROL_1 0x450
#define ARIZONA_DAC_AEC_CONTROL_2 0x451
#define ARIZONA_NOISE_GATE_CONTROL 0x458
#define ARIZONA_PDM_SPK1_CTRL_1 0x490
#define ARIZONA_PDM_SPK1_CTRL_2 0x491
#define ARIZONA_PDM_SPK2_CTRL_1 0x492
#define ARIZONA_PDM_SPK2_CTRL_2 0x493
#define ARIZONA_HP_TEST_CTRL_13 0x49A
#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0
#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1
#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2
@ -310,6 +315,10 @@
#define ARIZONA_AIF3_TX_ENABLES 0x599
#define ARIZONA_AIF3_RX_ENABLES 0x59A
#define ARIZONA_AIF3_FORCE_WRITE 0x59B
#define ARIZONA_SPD1_TX_CONTROL 0x5C2
#define ARIZONA_SPD1_TX_CHANNEL_STATUS_1 0x5C3
#define ARIZONA_SPD1_TX_CHANNEL_STATUS_2 0x5C4
#define ARIZONA_SPD1_TX_CHANNEL_STATUS_3 0x5C5
#define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3
#define ARIZONA_SLIMBUS_RATES_1 0x5E5
#define ARIZONA_SLIMBUS_RATES_2 0x5E6
@ -643,6 +652,10 @@
#define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD
#define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE
#define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF
#define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE 0x800
#define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME 0x801
#define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE 0x808
#define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME 0x809
#define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880
#define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881
#define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882
@ -868,6 +881,7 @@
#define ARIZONA_GPIO5_CTRL 0xC04
#define ARIZONA_IRQ_CTRL_1 0xC0F
#define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10
#define ARIZONA_GP_SWITCH_1 0xC18
#define ARIZONA_MISC_PAD_CTRL_1 0xC20
#define ARIZONA_MISC_PAD_CTRL_2 0xC21
#define ARIZONA_MISC_PAD_CTRL_3 0xC22
@ -1169,6 +1183,13 @@
#define ARIZONA_DSP4_SCRATCH_1 0x1441
#define ARIZONA_DSP4_SCRATCH_2 0x1442
#define ARIZONA_DSP4_SCRATCH_3 0x1443
#define ARIZONA_FRF_COEFF_1 0x1700
#define ARIZONA_FRF_COEFF_2 0x1701
#define ARIZONA_FRF_COEFF_3 0x1702
#define ARIZONA_FRF_COEFF_4 0x1703
#define ARIZONA_V2_DAC_COMP_1 0x1704
#define ARIZONA_V2_DAC_COMP_2 0x1705
/*
* Field Definitions.
@ -2325,6 +2346,9 @@
#define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */
#define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */
#define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */
#define WM8998_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */
#define WM8998_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */
#define WM8998_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */
#define ARIZONA_HP_RATE 0x0002 /* HP_RATE */
#define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */
#define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */
@ -2412,6 +2436,16 @@
#define ARIZONA_MICD_STS_SHIFT 0 /* MICD_STS */
#define ARIZONA_MICD_STS_WIDTH 1 /* MICD_STS */
/*
* R683 (0x2AB) - Mic Detect 4
*/
#define ARIZONA_MICDET_ADCVAL_DIFF_MASK 0xFF00 /* MICDET_ADCVAL_DIFF - [15:8] */
#define ARIZONA_MICDET_ADCVAL_DIFF_SHIFT 8 /* MICDET_ADCVAL_DIFF - [15:8] */
#define ARIZONA_MICDET_ADCVAL_DIFF_WIDTH 8 /* MICDET_ADCVAL_DIFF - [15:8] */
#define ARIZONA_MICDET_ADCVAL_MASK 0x007F /* MICDET_ADCVAL - [15:8] */
#define ARIZONA_MICDET_ADCVAL_SHIFT 0 /* MICDET_ADCVAL - [15:8] */
#define ARIZONA_MICDET_ADCVAL_WIDTH 7 /* MICDET_ADCVAL - [15:8] */
/*
* R707 (0x2C3) - Mic noise mix control 1
*/
@ -2528,6 +2562,12 @@
/*
* R785 (0x311) - ADC Digital Volume 1L
*/
#define ARIZONA_IN1L_SRC_MASK 0x4000 /* IN1L_SRC - [14] */
#define ARIZONA_IN1L_SRC_SHIFT 14 /* IN1L_SRC - [14] */
#define ARIZONA_IN1L_SRC_WIDTH 1 /* IN1L_SRC - [14] */
#define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */
#define ARIZONA_IN1L_SRC_SE_SHIFT 13 /* IN1L_SRC - [13] */
#define ARIZONA_IN1L_SRC_SE_WIDTH 1 /* IN1L_SRC - [13] */
#define ARIZONA_IN_VU 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
@ -2560,6 +2600,12 @@
/*
* R789 (0x315) - ADC Digital Volume 1R
*/
#define ARIZONA_IN1R_SRC_MASK 0x4000 /* IN1R_SRC - [14] */
#define ARIZONA_IN1R_SRC_SHIFT 14 /* IN1R_SRC - [14] */
#define ARIZONA_IN1R_SRC_WIDTH 1 /* IN1R_SRC - [14] */
#define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */
#define ARIZONA_IN1R_SRC_SE_SHIFT 13 /* IN1R_SRC - [13] */
#define ARIZONA_IN1R_SRC_SE_WIDTH 1 /* IN1R_SRC - [13] */
#define ARIZONA_IN_VU 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
@ -2604,6 +2650,12 @@
/*
* R793 (0x319) - ADC Digital Volume 2L
*/
#define ARIZONA_IN2L_SRC_MASK 0x4000 /* IN2L_SRC - [14] */
#define ARIZONA_IN2L_SRC_SHIFT 14 /* IN2L_SRC - [14] */
#define ARIZONA_IN2L_SRC_WIDTH 1 /* IN2L_SRC - [14] */
#define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */
#define ARIZONA_IN2L_SRC_SE_SHIFT 13 /* IN2L_SRC - [13] */
#define ARIZONA_IN2L_SRC_SE_WIDTH 1 /* IN2L_SRC - [13] */
#define ARIZONA_IN_VU 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */
#define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */
@ -3411,12 +3463,46 @@
#define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */
#define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */
/*
* R1088 (0x440) - DRE Enable (WM8998)
*/
#define WM8998_DRE3L_ENA 0x0020 /* DRE3L_ENA */
#define WM8998_DRE3L_ENA_MASK 0x0020 /* DRE3L_ENA */
#define WM8998_DRE3L_ENA_SHIFT 5 /* DRE3L_ENA */
#define WM8998_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */
#define WM8998_DRE2L_ENA 0x0008 /* DRE2L_ENA */
#define WM8998_DRE2L_ENA_MASK 0x0008 /* DRE2L_ENA */
#define WM8998_DRE2L_ENA_SHIFT 3 /* DRE2L_ENA */
#define WM8998_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */
#define WM8998_DRE2R_ENA 0x0004 /* DRE2R_ENA */
#define WM8998_DRE2R_ENA_MASK 0x0004 /* DRE2R_ENA */
#define WM8998_DRE2R_ENA_SHIFT 2 /* DRE2R_ENA */
#define WM8998_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */
#define WM8998_DRE1L_ENA 0x0002 /* DRE1L_ENA */
#define WM8998_DRE1L_ENA_MASK 0x0002 /* DRE1L_ENA */
#define WM8998_DRE1L_ENA_SHIFT 1 /* DRE1L_ENA */
#define WM8998_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */
#define WM8998_DRE1R_ENA 0x0001 /* DRE1R_ENA */
#define WM8998_DRE1R_ENA_MASK 0x0001 /* DRE1R_ENA */
#define WM8998_DRE1R_ENA_SHIFT 0 /* DRE1R_ENA */
#define WM8998_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */
/*
* R1089 (0x441) - DRE Control 1
*/
#define ARIZONA_DRE_ENV_TC_FAST_MASK 0x0F00 /* DRE_ENV_TC_FAST - [11:8] */
#define ARIZONA_DRE_ENV_TC_FAST_SHIFT 8 /* DRE_ENV_TC_FAST - [11:8] */
#define ARIZONA_DRE_ENV_TC_FAST_WIDTH 4 /* DRE_ENV_TC_FAST - [11:8] */
/*
* R1090 (0x442) - DRE Control 2
*/
#define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */
#define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */
#define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */
#define ARIZONA_DRE_ALOG_VOL_DELAY_MASK 0x000F /* DRE_ALOG_VOL_DELAY - [3:0] */
#define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT 0 /* DRE_ALOG_VOL_DELAY - [3:0] */
#define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH 4 /* DRE_ALOG_VOL_DELAY - [3:0] */
/*
* R1091 (0x443) - DRE Control 3
@ -3428,6 +3514,49 @@
#define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */
#define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */
/* R486 (0x448) - EDRE_Enable
*/
#define ARIZONA_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */
#define ARIZONA_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */
#define ARIZONA_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */
#define ARIZONA_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */
#define ARIZONA_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */
#define ARIZONA_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */
#define ARIZONA_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */
#define ARIZONA_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */
#define ARIZONA_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */
#define ARIZONA_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */
#define ARIZONA_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */
#define ARIZONA_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */
#define ARIZONA_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */
#define ARIZONA_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */
#define ARIZONA_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */
#define ARIZONA_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */
#define ARIZONA_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */
#define ARIZONA_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */
#define ARIZONA_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */
#define ARIZONA_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */
#define ARIZONA_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */
#define ARIZONA_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */
#define ARIZONA_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */
#define ARIZONA_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */
#define ARIZONA_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */
#define ARIZONA_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */
#define ARIZONA_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */
#define ARIZONA_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */
#define ARIZONA_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */
#define ARIZONA_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */
#define ARIZONA_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */
#define ARIZONA_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */
#define ARIZONA_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */
#define ARIZONA_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */
#define ARIZONA_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */
#define ARIZONA_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */
#define ARIZONA_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */
#define ARIZONA_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */
#define ARIZONA_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */
#define ARIZONA_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */
/*
* R1104 (0x450) - DAC AEC Control 1
*/
@ -4307,6 +4436,86 @@
#define ARIZONA_AIF3_FRC_WR_SHIFT 0 /* AIF3_FRC_WR */
#define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */
/*
* R1474 (0x5C2) - SPD1 TX Control
*/
#define ARIZONA_SPD1_VAL2 0x2000 /* SPD1_VAL2 */
#define ARIZONA_SPD1_VAL2_MASK 0x2000 /* SPD1_VAL2 */
#define ARIZONA_SPD1_VAL2_SHIFT 13 /* SPD1_VAL2 */
#define ARIZONA_SPD1_VAL2_WIDTH 1 /* SPD1_VAL2 */
#define ARIZONA_SPD1_VAL1 0x1000 /* SPD1_VAL1 */
#define ARIZONA_SPD1_VAL1_MASK 0x1000 /* SPD1_VAL1 */
#define ARIZONA_SPD1_VAL1_SHIFT 12 /* SPD1_VAL1 */
#define ARIZONA_SPD1_VAL1_WIDTH 1 /* SPD1_VAL1 */
#define ARIZONA_SPD1_RATE_MASK 0x00F0 /* SPD1_RATE */
#define ARIZONA_SPD1_RATE_SHIFT 4 /* SPD1_RATE */
#define ARIZONA_SPD1_RATE_WIDTH 4 /* SPD1_RATE */
#define ARIZONA_SPD1_ENA 0x0001 /* SPD1_ENA */
#define ARIZONA_SPD1_ENA_MASK 0x0001 /* SPD1_ENA */
#define ARIZONA_SPD1_ENA_SHIFT 0 /* SPD1_ENA */
#define ARIZONA_SPD1_ENA_WIDTH 1 /* SPD1_ENA */
/*
* R1475 (0x5C3) - SPD1 TX Channel Status 1
*/
#define ARIZONA_SPD1_CATCODE_MASK 0xFF00 /* SPD1_CATCODE */
#define ARIZONA_SPD1_CATCODE_SHIFT 8 /* SPD1_CATCODE */
#define ARIZONA_SPD1_CATCODE_WIDTH 8 /* SPD1_CATCODE */
#define ARIZONA_SPD1_CHSTMODE_MASK 0x00C0 /* SPD1_CHSTMODE */
#define ARIZONA_SPD1_CHSTMODE_SHIFT 6 /* SPD1_CHSTMODE */
#define ARIZONA_SPD1_CHSTMODE_WIDTH 2 /* SPD1_CHSTMODE */
#define ARIZONA_SPD1_PREEMPH_MASK 0x0038 /* SPD1_PREEMPH */
#define ARIZONA_SPD1_PREEMPH_SHIFT 3 /* SPD1_PREEMPH */
#define ARIZONA_SPD1_PREEMPH_WIDTH 3 /* SPD1_PREEMPH */
#define ARIZONA_SPD1_NOCOPY 0x0004 /* SPD1_NOCOPY */
#define ARIZONA_SPD1_NOCOPY_MASK 0x0004 /* SPD1_NOCOPY */
#define ARIZONA_SPD1_NOCOPY_SHIFT 2 /* SPD1_NOCOPY */
#define ARIZONA_SPD1_NOCOPY_WIDTH 1 /* SPD1_NOCOPY */
#define ARIZONA_SPD1_NOAUDIO 0x0002 /* SPD1_NOAUDIO */
#define ARIZONA_SPD1_NOAUDIO_MASK 0x0002 /* SPD1_NOAUDIO */
#define ARIZONA_SPD1_NOAUDIO_SHIFT 1 /* SPD1_NOAUDIO */
#define ARIZONA_SPD1_NOAUDIO_WIDTH 1 /* SPD1_NOAUDIO */
#define ARIZONA_SPD1_PRO 0x0001 /* SPD1_PRO */
#define ARIZONA_SPD1_PRO_MASK 0x0001 /* SPD1_PRO */
#define ARIZONA_SPD1_PRO_SHIFT 0 /* SPD1_PRO */
#define ARIZONA_SPD1_PRO_WIDTH 1 /* SPD1_PRO */
/*
* R1475 (0x5C4) - SPD1 TX Channel Status 2
*/
#define ARIZONA_SPD1_FREQ_MASK 0xF000 /* SPD1_FREQ */
#define ARIZONA_SPD1_FREQ_SHIFT 12 /* SPD1_FREQ */
#define ARIZONA_SPD1_FREQ_WIDTH 4 /* SPD1_FREQ */
#define ARIZONA_SPD1_CHNUM2_MASK 0x0F00 /* SPD1_CHNUM2 */
#define ARIZONA_SPD1_CHNUM2_SHIFT 8 /* SPD1_CHNUM2 */
#define ARIZONA_SPD1_CHNUM2_WIDTH 4 /* SPD1_CHNUM2 */
#define ARIZONA_SPD1_CHNUM1_MASK 0x00F0 /* SPD1_CHNUM1 */
#define ARIZONA_SPD1_CHNUM1_SHIFT 4 /* SPD1_CHNUM1 */
#define ARIZONA_SPD1_CHNUM1_WIDTH 4 /* SPD1_CHNUM1 */
#define ARIZONA_SPD1_SRCNUM_MASK 0x000F /* SPD1_SRCNUM */
#define ARIZONA_SPD1_SRCNUM_SHIFT 0 /* SPD1_SRCNUM */
#define ARIZONA_SPD1_SRCNUM_WIDTH 4 /* SPD1_SRCNUM */
/*
* R1475 (0x5C5) - SPD1 TX Channel Status 3
*/
#define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */
#define ARIZONA_SPD1_ORGSAMP_SHIFT 8 /* SPD1_ORGSAMP */
#define ARIZONA_SPD1_ORGSAMP_WIDTH 4 /* SPD1_ORGSAMP */
#define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */
#define ARIZONA_SPD1_TXWL_SHIFT 5 /* SPD1_TXWL */
#define ARIZONA_SPD1_TXWL_WIDTH 3 /* SPD1_TXWL */
#define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */
#define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */
#define ARIZONA_SPD1_MAXWL_SHIFT 4 /* SPD1_MAXWL */
#define ARIZONA_SPD1_MAXWL_WIDTH 1 /* SPD1_MAXWL */
#define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */
#define ARIZONA_SPD1_CS31_30_SHIFT 2 /* SPD1_CS31_30 */
#define ARIZONA_SPD1_CS31_30_WIDTH 2 /* SPD1_CS31_30 */
#define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */
#define ARIZONA_SPD1_CLKACU_SHIFT 2 /* SPD1_CLKACU */
#define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */
/*
* R1507 (0x5E3) - SLIMbus Framer Ref Gear
*/
@ -4561,6 +4770,13 @@
#define ARIZONA_GP_DBTIME_SHIFT 12 /* GP_DBTIME - [15:12] */
#define ARIZONA_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [15:12] */
/*
* R3096 (0xC18) - GP Switch 1
*/
#define ARIZONA_SW1_MODE_MASK 0x0003 /* SW1_MODE - [1:0] */
#define ARIZONA_SW1_MODE_SHIFT 0 /* SW1_MODE - [1:0] */
#define ARIZONA_SW1_MODE_WIDTH 2 /* SW1_MODE - [1:0] */
/*
* R3104 (0xC20) - Misc Pad Ctrl 1
*/
@ -6301,6 +6517,10 @@
/*
* R3366 (0xD26) - Interrupt Raw Status 8
*/
#define ARIZONA_SPDIF_OVERCLOCKED_STS 0x8000 /* SPDIF_OVERCLOCKED_STS */
#define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK 0x8000 /* SPDIF_OVERCLOCKED_STS */
#define ARIZONA_SPDIF_OVERCLOCKED_STS_SHIFT 15 /* SPDIF_OVERCLOCKED_STS */
#define ARIZONA_SPDIF_OVERCLOCKED_STS_WIDTH 1 /* SPDIF_OVERCLOCKED_STS */
#define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */
#define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */
#define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT 10 /* AIF3_UNDERCLOCKED_STS */