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[MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2007-05-31 14:03:45 +01:00
parent 8e8a52ed87
commit 6a05888d71
1 changed files with 7 additions and 0 deletions
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7
arch/mips/kernel/traps.c
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@ -1384,6 +1384,13 @@ void __init per_cpu_trap_init(void)
cpu_cache_init(); cpu_cache_init();
tlb_init(); tlb_init();
#ifdef CONFIG_MIPS_MT_SMTC #ifdef CONFIG_MIPS_MT_SMTC
} else if (!secondaryTC) {
/*
* First TC in non-boot VPE must do subset of tlb_init()
* for MMU countrol registers.
*/
write_c0_pagemask(PM_DEFAULT_MASK);
write_c0_wired(0);
} }
#endif /* CONFIG_MIPS_MT_SMTC */ #endif /* CONFIG_MIPS_MT_SMTC */
} }