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soc: Amlogic driver updates for v5.3

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- canvas: add support for Meson8*
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Merge tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: Amlogic driver updates for v5.3
- canvas: add support for Meson8*

* tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: canvas: add support for Meson8, Meson8b and Meson8m2
  dt-bindings: soc: amlogic: canvas: document support for Meson8/8b/8m2

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-25 05:40:57 -07:00
commit 71a34b7cc7
2 changed files with 20 additions and 4 deletions
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10
Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt
View File

@ -2,8 +2,8 @@ Amlogic Canvas
================================
A canvas is a collection of metadata that describes a pixel buffer.
Those metadata include: width, height, phyaddr, wrapping, block mode
and endianness.
Those metadata include: width, height, phyaddr, wrapping and block mode.
Starting with GXBB the endianness can also be described.
Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
rather than use the phy addresses directly. For instance, this is the case for
@ -18,7 +18,11 @@ Video Lookup Table
--------------------------
Required properties:
- compatible: "amlogic,canvas"
- compatible: has to be one of:
- "amlogic,meson8-canvas", "amlogic,canvas" on Meson8
- "amlogic,meson8b-canvas", "amlogic,canvas" on Meson8b
- "amlogic,meson8m2-canvas", "amlogic,canvas" on Meson8m2
- "amlogic,canvas" on GXBB and newer
- reg: Base physical address and size of the canvas registers.
Example:

14
drivers/soc/amlogic/meson-canvas.c
View File

@ -35,6 +35,7 @@ struct meson_canvas {
void __iomem *reg_base;
spinlock_t lock; /* canvas device lock */
u8 used[NUM_CANVAS];
bool supports_endianness;
};
static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val)
@ -86,6 +87,12 @@ int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index,
{
unsigned long flags;
if (endian && !canvas->supports_endianness) {
dev_err(canvas->dev,
"Endianness is not supported on this SoC\n");
return -EINVAL;
}
spin_lock_irqsave(&canvas->lock, flags);
if (!canvas->used[canvas_index]) {
dev_err(canvas->dev,
@ -172,6 +179,8 @@ static int meson_canvas_probe(struct platform_device *pdev)
if (IS_ERR(canvas->reg_base))
return PTR_ERR(canvas->reg_base);
canvas->supports_endianness = of_device_get_match_data(dev);
canvas->dev = dev;
spin_lock_init(&canvas->lock);
dev_set_drvdata(dev, canvas);
@ -180,7 +189,10 @@ static int meson_canvas_probe(struct platform_device *pdev)
}
static const struct of_device_id canvas_dt_match[] = {
{ .compatible = "amlogic,canvas" },
{ .compatible = "amlogic,meson8-canvas", .data = (void *)false, },
{ .compatible = "amlogic,meson8b-canvas", .data = (void *)false, },
{ .compatible = "amlogic,meson8m2-canvas", .data = (void *)false, },
{ .compatible = "amlogic,canvas", .data = (void *)true, },
{}
};
MODULE_DEVICE_TABLE(of, canvas_dt_match);