pwm: rockchip: Allow polarity invert on rk3288
The rk3288 has the ability to invert the polarity of the PWM. Let's enable that ability. Note that this increases pwm_cells to 3 for rk3288. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -7,8 +7,8 @@ Required properties:
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"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
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- reg: physical base address and length of the controller's registers
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- clocks: phandle and clock specifier of the PWM reference clock
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- #pwm-cells: should be 2. See pwm.txt in this directory for a
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description of the cell format.
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- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
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for a description of the cell format.
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Example:
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@ -24,7 +24,9 @@
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#define PWM_ENABLE (1 << 0)
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#define PWM_CONTINUOUS (1 << 1)
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#define PWM_DUTY_POSITIVE (1 << 3)
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#define PWM_DUTY_NEGATIVE (0 << 3)
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#define PWM_INACTIVE_NEGATIVE (0 << 4)
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#define PWM_INACTIVE_POSITIVE (1 << 4)
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#define PWM_OUTPUT_LEFT (0 << 5)
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#define PWM_LP_DISABLE (0 << 8)
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@ -45,8 +47,10 @@ struct rockchip_pwm_regs {
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struct rockchip_pwm_data {
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struct rockchip_pwm_regs regs;
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unsigned int prescaler;
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const struct pwm_ops *ops;
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void (*set_enable)(struct pwm_chip *chip, bool enable);
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void (*set_enable)(struct pwm_chip *chip,
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struct pwm_device *pwm, bool enable);
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};
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static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
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@ -54,7 +58,8 @@ static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
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return container_of(c, struct rockchip_pwm_chip, chip);
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}
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static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
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static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
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struct pwm_device *pwm, bool enable)
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{
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struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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u32 enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN;
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@ -70,14 +75,19 @@ static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
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writel_relaxed(val, pc->base + pc->data->regs.ctrl);
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}
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static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
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static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, bool enable)
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{
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struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE |
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PWM_CONTINUOUS | PWM_DUTY_POSITIVE |
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PWM_INACTIVE_NEGATIVE;
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PWM_CONTINUOUS;
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u32 val;
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if (pwm->polarity == PWM_POLARITY_INVERSED)
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enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE;
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else
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enable_conf |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE;
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val = readl_relaxed(pc->base + pc->data->regs.ctrl);
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if (enable)
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@ -124,6 +134,19 @@ static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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return 0;
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}
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static int rockchip_pwm_set_polarity(struct pwm_chip *chip,
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struct pwm_device *pwm,
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enum pwm_polarity polarity)
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{
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/*
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* No action needed here because pwm->polarity will be set by the core
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* and the core will only change polarity when the PWM is not enabled.
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* We'll handle things in set_enable().
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*/
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return 0;
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}
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static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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@ -133,7 +156,7 @@ static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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if (ret)
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return ret;
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pc->data->set_enable(chip, true);
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pc->data->set_enable(chip, pwm, true);
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return 0;
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}
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@ -142,18 +165,26 @@ static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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pc->data->set_enable(chip, false);
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pc->data->set_enable(chip, pwm, false);
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clk_disable(pc->clk);
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}
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static const struct pwm_ops rockchip_pwm_ops = {
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static const struct pwm_ops rockchip_pwm_ops_v1 = {
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.config = rockchip_pwm_config,
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.enable = rockchip_pwm_enable,
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.disable = rockchip_pwm_disable,
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.owner = THIS_MODULE,
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};
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static const struct pwm_ops rockchip_pwm_ops_v2 = {
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.config = rockchip_pwm_config,
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.set_polarity = rockchip_pwm_set_polarity,
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.enable = rockchip_pwm_enable,
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.disable = rockchip_pwm_disable,
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.owner = THIS_MODULE,
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};
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static const struct rockchip_pwm_data pwm_data_v1 = {
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.regs = {
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.duty = 0x04,
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@ -162,6 +193,7 @@ static const struct rockchip_pwm_data pwm_data_v1 = {
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.ctrl = 0x0c,
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},
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.prescaler = 2,
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.ops = &rockchip_pwm_ops_v1,
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.set_enable = rockchip_pwm_set_enable_v1,
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};
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@ -173,6 +205,7 @@ static const struct rockchip_pwm_data pwm_data_v2 = {
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.ctrl = 0x0c,
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},
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.prescaler = 1,
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.ops = &rockchip_pwm_ops_v2,
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.set_enable = rockchip_pwm_set_enable_v2,
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};
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@ -184,6 +217,7 @@ static const struct rockchip_pwm_data pwm_data_vop = {
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.ctrl = 0x00,
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},
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.prescaler = 1,
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.ops = &rockchip_pwm_ops_v2,
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.set_enable = rockchip_pwm_set_enable_v2,
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};
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@ -227,10 +261,15 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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pc->data = id->data;
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pc->chip.dev = &pdev->dev;
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pc->chip.ops = &rockchip_pwm_ops;
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pc->chip.ops = pc->data->ops;
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pc->chip.base = -1;
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pc->chip.npwm = 1;
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if (pc->data->ops->set_polarity) {
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pc->chip.of_xlate = of_pwm_xlate_with_flags;
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pc->chip.of_pwm_n_cells = 3;
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}
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ret = pwmchip_add(&pc->chip);
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if (ret < 0) {
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clk_unprepare(pc->clk);
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