Merge branch 'FEC-MDIO-speedups'
Andrew Lunn says: ==================== FEC MDIO speedups This patchset gives a number of speedups for MDIO with the FEC. Replacing interrupt driven with polled IO brings a big speedup due to the overheads of interrupts compared to the short time interval. Clocking the bus faster, when the MDIO targets supports it, can double the transfer rate. And suppressing the preamble, if devices support it, makes each transaction faster. By default the MDIO clock remains 2.5MHz and preables are used. But these can now be controlled from the device tree. Since these are generic properties applicable to more than just FEC, these have been added to the generic MDIO binding documentation. v2: readl_poll_timeout() Add patches to set bus frequency and preamble disable v3: Add Reviewed tags uS->us readl_poll_timeout_atomic() Extend DT binding documentation ==================== Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
749d22e8f6
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@ -82,6 +82,7 @@ ethernet@83fec000 {
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phy-supply = <®_fec_supply>;
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phy-handle = <ðphy>;
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mdio {
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clock-frequency = <5000000>;
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ethphy: ethernet-phy@6 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <6>;
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@ -39,6 +39,18 @@ properties:
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and must therefore be appropriately determined based on all PHY
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requirements (maximum value of all per-PHY RESET pulse widths).
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clock-frequency:
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description:
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Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
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defined 2.5MHz should only be used when all devices on the bus support
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the given clock speed.
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suppress-preamble:
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description:
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The 32 bit preamble should be suppressed. In order for this to
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work, all devices on the bus must support suppressed preamble.
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type: boolean
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patternProperties:
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"^ethernet-phy@[0-9a-f]+$":
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type: object
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@ -376,8 +376,7 @@ struct bufdesc_ex {
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#define FEC_ENET_TS_AVAIL ((uint)0x00010000)
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#define FEC_ENET_TS_TIMER ((uint)0x00008000)
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#define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
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#define FEC_NAPI_IMASK FEC_ENET_MII
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#define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF)
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#define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF))
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/* ENET interrupt coalescing macro define */
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@ -543,7 +542,6 @@ struct fec_enet_private {
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int link;
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int full_duplex;
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int speed;
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struct completion mdio_done;
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int irq[FEC_IRQ_NUM];
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bool bufdesc_ex;
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int pause_flag;
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@ -976,8 +976,8 @@ fec_restart(struct net_device *ndev)
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writel((__force u32)cpu_to_be32(temp_mac[1]),
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fep->hwp + FEC_ADDR_HIGH);
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/* Clear any outstanding interrupt. */
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writel(0xffffffff, fep->hwp + FEC_IEVENT);
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/* Clear any outstanding interrupt, except MDIO. */
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writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT);
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fec_enet_bd_init(ndev);
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@ -1123,7 +1123,7 @@ fec_restart(struct net_device *ndev)
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if (fep->link)
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writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
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else
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writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
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writel(0, fep->hwp + FEC_IMASK);
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/* Init the interrupt coalescing */
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fec_enet_itr_coal_init(ndev);
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@ -1652,6 +1652,10 @@ fec_enet_interrupt(int irq, void *dev_id)
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irqreturn_t ret = IRQ_NONE;
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int_events = readl(fep->hwp + FEC_IEVENT);
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/* Don't clear MDIO events, we poll for those */
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int_events &= ~FEC_ENET_MII;
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writel(int_events, fep->hwp + FEC_IEVENT);
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fec_enet_collect_events(fep, int_events);
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@ -1659,16 +1663,12 @@ fec_enet_interrupt(int irq, void *dev_id)
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ret = IRQ_HANDLED;
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if (napi_schedule_prep(&fep->napi)) {
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/* Disable the NAPI interrupts */
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writel(FEC_NAPI_IMASK, fep->hwp + FEC_IMASK);
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/* Disable interrupts */
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writel(0, fep->hwp + FEC_IMASK);
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__napi_schedule(&fep->napi);
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}
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}
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if (int_events & FEC_ENET_MII) {
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ret = IRQ_HANDLED;
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complete(&fep->mdio_done);
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}
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return ret;
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}
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@ -1818,11 +1818,24 @@ static void fec_enet_adjust_link(struct net_device *ndev)
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phy_print_status(phy_dev);
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}
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static int fec_enet_mdio_wait(struct fec_enet_private *fep)
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{
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uint ievent;
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int ret;
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ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent,
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ievent & FEC_ENET_MII, 2, 30000);
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if (!ret)
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writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
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return ret;
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}
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static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct fec_enet_private *fep = bus->priv;
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struct device *dev = &fep->pdev->dev;
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unsigned long time_left;
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int ret = 0, frame_start, frame_addr, frame_op;
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bool is_c45 = !!(regnum & MII_ADDR_C45);
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@ -1830,8 +1843,6 @@ static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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if (ret < 0)
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return ret;
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reinit_completion(&fep->mdio_done);
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if (is_c45) {
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frame_start = FEC_MMFR_ST_C45;
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@ -1843,11 +1854,9 @@ static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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fep->hwp + FEC_MII_DATA);
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/* wait for end of transfer */
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time_left = wait_for_completion_timeout(&fep->mdio_done,
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usecs_to_jiffies(FEC_MII_TIMEOUT));
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if (time_left == 0) {
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ret = fec_enet_mdio_wait(fep);
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if (ret) {
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netdev_err(fep->netdev, "MDIO address write timeout\n");
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ret = -ETIMEDOUT;
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goto out;
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}
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@ -1866,11 +1875,9 @@ static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
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/* wait for end of transfer */
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time_left = wait_for_completion_timeout(&fep->mdio_done,
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usecs_to_jiffies(FEC_MII_TIMEOUT));
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if (time_left == 0) {
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ret = fec_enet_mdio_wait(fep);
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if (ret) {
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netdev_err(fep->netdev, "MDIO read timeout\n");
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ret = -ETIMEDOUT;
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goto out;
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}
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@ -1888,7 +1895,6 @@ static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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{
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struct fec_enet_private *fep = bus->priv;
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struct device *dev = &fep->pdev->dev;
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unsigned long time_left;
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int ret, frame_start, frame_addr;
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bool is_c45 = !!(regnum & MII_ADDR_C45);
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@ -1898,8 +1904,6 @@ static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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else
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ret = 0;
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reinit_completion(&fep->mdio_done);
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if (is_c45) {
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frame_start = FEC_MMFR_ST_C45;
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@ -1911,11 +1915,9 @@ static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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fep->hwp + FEC_MII_DATA);
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/* wait for end of transfer */
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time_left = wait_for_completion_timeout(&fep->mdio_done,
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usecs_to_jiffies(FEC_MII_TIMEOUT));
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if (time_left == 0) {
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ret = fec_enet_mdio_wait(fep);
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if (ret) {
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netdev_err(fep->netdev, "MDIO address write timeout\n");
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ret = -ETIMEDOUT;
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goto out;
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}
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} else {
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@ -1931,12 +1933,9 @@ static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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fep->hwp + FEC_MII_DATA);
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/* wait for end of transfer */
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time_left = wait_for_completion_timeout(&fep->mdio_done,
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usecs_to_jiffies(FEC_MII_TIMEOUT));
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if (time_left == 0) {
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ret = fec_enet_mdio_wait(fep);
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if (ret)
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netdev_err(fep->netdev, "MDIO write timeout\n");
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ret = -ETIMEDOUT;
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}
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out:
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pm_runtime_mark_last_busy(dev);
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@ -2065,9 +2064,11 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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static struct mii_bus *fec0_mii_bus;
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct fec_enet_private *fep = netdev_priv(ndev);
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bool suppress_preamble = false;
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struct device_node *node;
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int err = -ENXIO;
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u32 mii_speed, holdtime;
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u32 bus_freq;
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/*
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* The i.MX28 dual fec interfaces are not equal.
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@ -2095,15 +2096,23 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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return -ENOENT;
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}
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bus_freq = 2500000; /* 2.5MHz by default */
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node = of_get_child_by_name(pdev->dev.of_node, "mdio");
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if (node) {
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of_property_read_u32(node, "clock-frequency", &bus_freq);
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suppress_preamble = of_property_read_bool(node,
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"suppress-preamble");
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}
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/*
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* Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
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* Set MII speed (= clk_get_rate() / 2 * phy_speed)
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*
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* The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
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* for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
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* Reference Manual has an error on this, and gets fixed on i.MX6Q
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* document.
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*/
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mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
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mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2);
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if (fep->quirks & FEC_QUIRK_ENET_MAC)
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mii_speed--;
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if (mii_speed > 63) {
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@ -2130,8 +2139,14 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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fep->phy_speed = mii_speed << 1 | holdtime << 8;
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if (suppress_preamble)
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fep->phy_speed |= BIT(7);
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writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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/* Clear any pending transaction complete indication */
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writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
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fep->mii_bus = mdiobus_alloc();
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if (fep->mii_bus == NULL) {
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err = -ENOMEM;
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@ -2146,7 +2161,6 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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fep->mii_bus->priv = fep;
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fep->mii_bus->parent = &pdev->dev;
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node = of_get_child_by_name(pdev->dev.of_node, "mdio");
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err = of_mdiobus_register(fep->mii_bus, node);
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of_node_put(node);
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if (err)
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@ -3674,7 +3688,6 @@ fec_probe(struct platform_device *pdev)
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fep->irq[i] = irq;
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}
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init_completion(&fep->mdio_done);
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ret = fec_enet_mii_init(pdev);
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if (ret)
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goto failed_mii_init;
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