[SCSI] aic7xxx: upport all sequencer and core fixes from adaptec version 6.3.9
This patch upports all relevant code fixes and bumps the driver version to 7.0 to signify starting a new tree. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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@ -1,5 +1,5 @@
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====================================================================
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= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.28 =
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= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0 =
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= README for =
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= The Linux Operating System =
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====================================================================
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@ -131,6 +131,10 @@ The following information is available in this file:
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SCSI "stub" effects.
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2. Version History
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7.0 (4th August, 2005)
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- Updated driver to use SCSI transport class infrastructure
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- Upported sequencer and core fixes from last adaptec released
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version of the driver.
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6.2.36 (June 3rd, 2003)
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- Correct code that disables PCI parity error checking.
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- Correct and simplify handling of the ignore wide residue
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@ -37,7 +37,7 @@
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#79 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#85 $
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*
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* $FreeBSD$
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*/
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@ -243,7 +243,7 @@ typedef enum {
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*/
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AHC_AIC7850_FE = AHC_SPIOCAP|AHC_AUTOPAUSE|AHC_TARGETMODE|AHC_ULTRA,
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AHC_AIC7860_FE = AHC_AIC7850_FE,
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AHC_AIC7870_FE = AHC_TARGETMODE,
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AHC_AIC7870_FE = AHC_TARGETMODE|AHC_AUTOPAUSE,
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AHC_AIC7880_FE = AHC_AIC7870_FE|AHC_ULTRA,
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/*
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* Although we have space for both the initiator and
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@ -39,7 +39,7 @@
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*
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* $FreeBSD$
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*/
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VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $"
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VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $"
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/*
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* This file is processed by the aic7xxx_asm utility for use in assembling
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@ -1306,7 +1306,6 @@ scratch_ram {
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*/
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MWI_RESIDUAL {
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size 1
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alias TARG_IMMEDIATE_SCB
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}
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/*
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* SCBID of the next SCB to be started by the controller.
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@ -1461,6 +1460,7 @@ scratch_ram {
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*/
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LAST_MSG {
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size 1
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alias TARG_IMMEDIATE_SCB
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}
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/*
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@ -40,7 +40,7 @@
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* $FreeBSD$
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*/
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VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $"
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VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $"
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PATCH_ARG_LIST = "struct ahc_softc *ahc"
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PREFIX = "ahc_"
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@ -679,6 +679,7 @@ await_busfree:
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clr SCSIBUSL; /* Prevent bit leakage durint SELTO */
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}
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and SXFRCTL0, ~SPIOEN;
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mvi SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT;
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test SSTAT1,REQINIT|BUSFREE jz .;
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test SSTAT1, BUSFREE jnz poll_for_work;
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mvi MISSED_BUSFREE call set_seqint;
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@ -1097,7 +1098,7 @@ ultra2_dmahalt:
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test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg;
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if ((ahc->flags & AHC_TARGETROLE) != 0) {
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test SSTAT0, TARGET jz dma_last_sg;
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if ((ahc->flags & AHC_TMODE_WIDEODD_BUG) != 0) {
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if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0) {
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test DMAPARAMS, DIRECTION jz dma_mid_sg;
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}
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}
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@ -28,9 +28,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#17 $
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*
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* $FreeBSD$
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#19 $
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*/
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/*
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@ -64,7 +62,6 @@
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* is preceded by an initial zero (leading 0, followed by 16-bits, MSB
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* first). The clock cycling from low to high initiates the next data
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* bit to be sent from the chip.
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*
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*/
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#ifdef __linux__
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@ -81,14 +78,22 @@
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* Right now, we only have to read the SEEPROM. But we make it easier to
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* add other 93Cx6 functions.
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*/
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static struct seeprom_cmd {
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struct seeprom_cmd {
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uint8_t len;
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uint8_t bits[9];
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} seeprom_read = {3, {1, 1, 0}};
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uint8_t bits[11];
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};
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/* Short opcodes for the c46 */
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static struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
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static struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
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/* Long opcodes for the C56/C66 */
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static struct seeprom_cmd seeprom_long_ewen = {11, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
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static struct seeprom_cmd seeprom_long_ewds = {11, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
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/* Common opcodes */
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static struct seeprom_cmd seeprom_write = {3, {1, 0, 1}};
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static struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
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/*
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* Wait for the SEERDY to go high; about 800 ns.
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@ -222,12 +227,25 @@ int
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ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
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u_int start_addr, u_int count)
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{
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struct seeprom_cmd *ewen, *ewds;
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uint16_t v;
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uint8_t temp;
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int i, k;
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/* Place the chip into write-enable mode */
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send_seeprom_cmd(sd, &seeprom_ewen);
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if (sd->sd_chip == C46) {
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ewen = &seeprom_ewen;
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ewds = &seeprom_ewds;
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} else if (sd->sd_chip == C56_66) {
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ewen = &seeprom_long_ewen;
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ewds = &seeprom_long_ewds;
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} else {
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printf("ahc_write_seeprom: unsupported seeprom type %d\n",
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sd->sd_chip);
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return (0);
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}
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send_seeprom_cmd(sd, ewen);
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reset_seeprom(sd);
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/* Write all requested data out to the seeprom. */
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@ -277,7 +295,7 @@ ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
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}
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/* Put the chip back into write-protect mode */
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send_seeprom_cmd(sd, &seeprom_ewds);
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send_seeprom_cmd(sd, ewds);
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reset_seeprom(sd);
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return (1);
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#134 $
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*
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* $FreeBSD$
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#155 $
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*/
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#ifdef __linux__
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@ -287,10 +285,19 @@ ahc_restart(struct ahc_softc *ahc)
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ahc_outb(ahc, SEQ_FLAGS2,
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ahc_inb(ahc, SEQ_FLAGS2) & ~SCB_DMA);
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}
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/*
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* Clear any pending sequencer interrupt. It is no
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* longer relevant since we're resetting the Program
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* Counter.
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*/
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ahc_outb(ahc, CLRINT, CLRSEQINT);
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ahc_outb(ahc, MWI_RESIDUAL, 0);
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ahc_outb(ahc, SEQCTL, ahc->seqctl);
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ahc_outb(ahc, SEQADDR0, 0);
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ahc_outb(ahc, SEQADDR1, 0);
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ahc_unpause(ahc);
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}
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@ -1174,19 +1181,20 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
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scb_index);
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}
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#endif
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/*
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* Force a renegotiation with this target just in
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* case the cable was pulled and will later be
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* re-attached. The target may forget its negotiation
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* settings with us should it attempt to reselect
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* during the interruption. The target will not issue
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* a unit attention in this case, so we must always
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* renegotiate.
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*/
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ahc_scb_devinfo(ahc, &devinfo, scb);
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ahc_force_renegotiation(ahc, &devinfo);
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ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
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ahc_freeze_devq(ahc, scb);
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/*
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* Cancel any pending transactions on the device
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* now that it seems to be missing. This will
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* also revert us to async/narrow transfers until
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* we can renegotiate with the device.
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*/
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ahc_handle_devreset(ahc, &devinfo,
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CAM_SEL_TIMEOUT,
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"Selection Timeout",
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/*verbose_level*/1);
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}
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ahc_outb(ahc, CLRINT, CLRSCSIINT);
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ahc_restart(ahc);
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@ -3763,6 +3771,7 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
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/*period*/0, /*offset*/0, /*ppr_options*/0,
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AHC_TRANS_CUR, /*paused*/TRUE);
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if (status != CAM_SEL_TIMEOUT)
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ahc_send_async(ahc, devinfo->channel, devinfo->target,
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CAM_LUN_WILDCARD, AC_SENT_BDR, NULL);
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@ -4003,14 +4012,6 @@ ahc_reset(struct ahc_softc *ahc, int reinit)
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* to disturb the integrity of the bus.
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*/
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ahc_pause(ahc);
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if ((ahc_inb(ahc, HCNTRL) & CHIPRST) != 0) {
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/*
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* The chip has not been initialized since
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* PCI/EISA/VLB bus reset. Don't trust
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* "left over BIOS data".
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*/
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ahc->flags |= AHC_NO_BIOS_INIT;
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}
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sxfrctl1_b = 0;
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if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
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u_int sblkctl;
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@ -5036,14 +5037,23 @@ ahc_pause_and_flushwork(struct ahc_softc *ahc)
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ahc->flags |= AHC_ALL_INTERRUPTS;
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paused = FALSE;
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do {
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if (paused)
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if (paused) {
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ahc_unpause(ahc);
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/*
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* Give the sequencer some time to service
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* any active selections.
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*/
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ahc_delay(500);
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}
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ahc_intr(ahc);
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ahc_pause(ahc);
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paused = TRUE;
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ahc_outb(ahc, SCSISEQ, ahc_inb(ahc, SCSISEQ) & ~ENSELO);
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intstat = ahc_inb(ahc, INTSTAT);
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if ((intstat & INT_PEND) == 0) {
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ahc_clear_critical_section(ahc);
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intstat = ahc_inb(ahc, INTSTAT);
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}
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} while (--maxloops
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&& (intstat != 0xFF || (ahc->features & AHC_REMOVABLE) == 0)
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&& ((intstat & INT_PEND) != 0
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targ->sdev[sdev->lun] = sdev;
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spi_period(starget) = 0;
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return 0;
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}
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/***************************** SMP support ************************************/
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#include <linux/spinlock.h>
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#define AIC7XXX_DRIVER_VERSION "6.2.36"
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#define AIC7XXX_DRIVER_VERSION "7.0"
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/*************************** Device Data Structures ***************************/
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/*
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* DO NOT EDIT - This file is automatically generated
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* from the following source files:
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
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*/
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typedef int (ahc_reg_print_t)(u_int, u_int *, u_int);
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typedef struct ahc_reg_parse_entry {
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@ -1298,7 +1298,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
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#define CMDSIZE_TABLE_TAIL 0x34
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#define MWI_RESIDUAL 0x38
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#define TARG_IMMEDIATE_SCB 0x38
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#define NEXT_QUEUED_SCB 0x39
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@ -1380,6 +1379,7 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
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#define RETURN_2 0x52
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#define LAST_MSG 0x53
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#define TARG_IMMEDIATE_SCB 0x53
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#define SCSISEQ_TEMPLATE 0x54
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#define ENSELO 0x40
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* DO NOT EDIT - This file is automatically generated
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* from the following source files:
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
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*/
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#include "aic7xxx_osm.h"
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