iwmc3200wifi: Update fixed size config definitions
We need to be in sync with the latest firmware API. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -102,7 +102,6 @@ enum {
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CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN,
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CFG_TLC_SUPPORTED_TX_HT_RATES,
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CFG_TLC_SUPPORTED_TX_RATES,
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CFG_TLC_VALID_ANTENNA,
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CFG_TLC_SPATIAL_STREAM_SUPPORTED,
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CFG_TLC_RETRY_PER_RATE,
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CFG_TLC_RETRY_PER_HT_RATE,
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@ -136,6 +135,10 @@ enum {
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CFG_TLC_RENEW_ADDBA_DELAY,
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CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD,
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CFG_TLC_IS_STABLE_IN_HT,
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CFG_TLC_SR_SIC_1ST_FAIL,
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CFG_TLC_SR_SIC_1ST_PASS,
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CFG_TLC_SR_SIC_TOTAL_FAIL,
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CFG_TLC_SR_SIC_TOTAL_PASS,
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CFG_RLC_CHAIN_CTRL,
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CFG_TRK_TABLE_OP_MODE,
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CFG_TRK_TABLE_RSSI_THRESHOLD,
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@ -147,6 +150,58 @@ enum {
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CFG_MLME_DBG_NOTIF_BLOCK,
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CFG_BT_OFF_BECONS_INTERVALS,
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CFG_BT_FRAG_DURATION,
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CFG_ACTIVE_CHAINS,
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CFG_CALIB_CTRL,
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CFG_CAPABILITY_SUPPORTED_HT_RATES,
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CFG_HT_MAC_PARAM_INFO,
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CFG_MIMO_PS_MODE,
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CFG_HT_DEFAULT_CAPABILIES_INFO,
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CFG_LED_SC_RESOLUTION_FACTOR,
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CFG_PTAM_ENERGY_CCK_DET_DEFAULT,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_DEFAULT,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_DEFAULT,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_DEFAULT,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_DEFAULT,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_DEFAULT,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_DEFAULT,
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CFG_PTAM_ENERGY_CCK_DET_MIN_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MIN_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MIN_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MIN_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MIN_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MIN_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MIN_VAL,
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CFG_PTAM_ENERGY_CCK_DET_MAX_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MAX_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MAX_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MAX_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MAX_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MAX_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MAX_VAL,
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CFG_PTAM_ENERGY_CCK_DET_STEP_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_STEP_VAL,
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CFG_PTAM_CORR40_4_TH_ADD_MIN_STEP_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_STEP_VAL,
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CFG_PTAM_CORR32_4_TH_ADD_MIN_STEP_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_STEP_VAL,
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CFG_PTAM_CORR32_1_TH_ADD_MIN_STEP_VAL,
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CFG_PTAM_LINK_SENS_FA_OFDM_MAX,
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CFG_PTAM_LINK_SENS_FA_OFDM_MIN,
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CFG_PTAM_LINK_SENS_FA_CCK_MAX,
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CFG_PTAM_LINK_SENS_FA_CCK_MIN,
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CFG_PTAM_LINK_SENS_NRG_DIFF,
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CFG_PTAM_LINK_SENS_NRG_MARGIN,
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CFG_PTAM_LINK_SENS_MAX_NUMBER_OF_TIMES_IN_CCK_NO_FA,
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CFG_PTAM_LINK_SENS_AUTO_CORR_MAX_TH_CCK,
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CFG_AGG_MGG_TID_LOAD_ADDBA_THRESHOLD,
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CFG_AGG_MGG_TID_LOAD_DELBA_THRESHOLD,
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CFG_AGG_MGG_ADDBA_BUF_SIZE,
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CFG_AGG_MGG_ADDBA_INACTIVE_TIMEOUT,
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CFG_AGG_MGG_ADDBA_DEBUG_FLAGS,
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CFG_SCAN_PERIODIC_RSSI_HIGH_THRESHOLD,
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CFG_SCAN_PERIODIC_COEF_RSSI_HIGH,
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CFG_11D_ENABLED,
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CFG_11H_FEATURE_FLAGS,
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/* <-- LAST --> */
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CFG_TBL_FIX_LAST
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@ -155,7 +210,8 @@ enum {
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/* variable size table */
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enum {
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CFG_NET_ADDR = 0,
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CFG_PROFILE,
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CFG_LED_PATTERN_TABLE,
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/* <-- LAST --> */
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CFG_TBL_VAR_LAST
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};
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