dmaengine: imx-sdma: add 1ms delay to ensure SDMA channel is stopped
sdma_disable_channel() cannot ensure dma is stopped to access module's FIFOs. There is chance SDMA core is running and accessing BD when disable of corresponding channel, this may cause sometimes even after call of .sdma_disable_channel(), SDMA core still be running and accessing module's FIFOs. According to NXP R&D team a delay of one BD SDMA cost time (maximum is 1ms) should be added after disable of the channel bit, to ensure SDMA core has really been stopped after SDMA clients call .device_terminate_all. This patch introduces adds a new function sdma_disable_channel_with_delay() which simply adds 1ms delay after call sdma_disable_channel(), and set it as .device_terminate_all. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -937,6 +937,21 @@ static int sdma_disable_channel(struct dma_chan *chan)
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return 0;
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}
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static int sdma_disable_channel_with_delay(struct dma_chan *chan)
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{
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sdma_disable_channel(chan);
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/*
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* According to NXP R&D team a delay of one BD SDMA cost time
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* (maximum is 1ms) should be added after disable of the channel
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* bit, to ensure SDMA core has really been stopped after SDMA
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* clients call .device_terminate_all.
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*/
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mdelay(1);
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return 0;
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}
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static void sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac)
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{
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struct sdma_engine *sdma = sdmac->sdma;
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@ -1828,7 +1843,7 @@ static int sdma_probe(struct platform_device *pdev)
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sdma->dma_device.device_prep_slave_sg = sdma_prep_slave_sg;
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sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic;
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sdma->dma_device.device_config = sdma_config;
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sdma->dma_device.device_terminate_all = sdma_disable_channel;
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sdma->dma_device.device_terminate_all = sdma_disable_channel_with_delay;
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sdma->dma_device.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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sdma->dma_device.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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sdma->dma_device.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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