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media: v4l: vsp1: Fix video output on R8A77970

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Commit d455b45f83 ("v4l: vsp1: Add support for new VSP2-BS, VSP2-DL,
and VSP2-D instances") added support for the VSP2-D found in the R-Car
V3M (R8A77970) but the video output that VSP2-D sends to DU has a greenish
garbage-like line repeated every 8 screen rows. It turns out that R-Car
V3M has the LIF0 buffer attribute register that you need to set to a non-
default value in order to get rid of the output artifacts.

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.

Fixes: d455b45f83 ("v4l: vsp1: Add support for new VSP2-BS, VSP2-DL and VSP2-D instances")
[Removed braces, added VI6_IP_VERSION_MASK to improve readabiliy]

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Sergei Shtylyov 2018-01-18 09:05:51 -05:00 committed by Mauro Carvalho Chehab
parent 0622700867
commit 7f43ff953f
2 changed files with 18 additions and 0 deletions
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12
drivers/media/platform/vsp1/vsp1_lif.c
View File

@ -155,6 +155,18 @@ static void lif_configure(struct vsp1_entity *entity,
(obth << VI6_LIF_CTRL_OBTH_SHIFT) |
(format->code == 0 ? VI6_LIF_CTRL_CFMT : 0) |
VI6_LIF_CTRL_REQSEL | VI6_LIF_CTRL_LIF_EN);
/*
* On R-Car V3M the LIF0 buffer attribute register has to be set to a
* non-default value to guarantee proper operation (otherwise artifacts
* may appear on the output). The value required by the manual is not
* explained but is likely a buffer size or threshold.
*/
if ((entity->vsp1->version & VI6_IP_VERSION_MASK) ==
(VI6_IP_VERSION_MODEL_VSPD_V3 | VI6_IP_VERSION_SOC_V3M))
vsp1_lif_write(lif, dl, VI6_LIF_LBA,
VI6_LIF_LBA_LBA0 |
(1536 << VI6_LIF_LBA_LBA1_SHIFT));
}
static const struct vsp1_entity_operations lif_entity_ops = {

6
drivers/media/platform/vsp1/vsp1_regs.h
View File

@ -693,6 +693,11 @@
#define VI6_LIF_CSBTH_LBTH_MASK (0x7ff << 0)
#define VI6_LIF_CSBTH_LBTH_SHIFT 0
#define VI6_LIF_LBA 0x3b0c
#define VI6_LIF_LBA_LBA0 (1 << 31)
#define VI6_LIF_LBA_LBA1_MASK (0xfff << 16)
#define VI6_LIF_LBA_LBA1_SHIFT 16
/* -----------------------------------------------------------------------------
* Security Control Registers
*/
@ -705,6 +710,7 @@
*/
#define VI6_IP_VERSION 0x3f00
#define VI6_IP_VERSION_MASK (0xffff << 0)
#define VI6_IP_VERSION_MODEL_MASK (0xff << 8)
#define VI6_IP_VERSION_MODEL_VSPS_H2 (0x09 << 8)
#define VI6_IP_VERSION_MODEL_VSPR_H2 (0x0a << 8)