Blackfin: use on-chip reset func with newer parts
Turns out the documentation is wrong and doing "RAISE 1" does not result in a software reset, only a core reset. So when the on-chip rom has a functioning reset helper, use it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -23,6 +23,9 @@
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__attribute__ ((__l1_text__, __noreturn__))
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static void bfin_reset(void)
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{
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if (!ANOMALY_05000353 && !ANOMALY_05000386)
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bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20));
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/* Wait for completion of "system" events such as cache line
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* line fills so that we avoid infinite stalls later on as
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* much as possible. This code is in L1, so it won't trigger
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@ -30,46 +33,40 @@ static void bfin_reset(void)
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*/
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__builtin_bfin_ssync();
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/* The bootrom checks to see how it was reset and will
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* automatically perform a software reset for us when
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* it starts executing after the core reset.
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/* Initiate System software reset. */
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bfin_write_SWRST(0x7);
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/* Due to the way reset is handled in the hardware, we need
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* to delay for 10 SCLKS. The only reliable way to do this is
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* to calculate the CCLK/SCLK ratio and multiply 10. For now,
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* we'll assume worse case which is a 1:15 ratio.
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*/
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if (ANOMALY_05000353 || ANOMALY_05000386) {
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/* Initiate System software reset. */
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bfin_write_SWRST(0x7);
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asm(
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"LSETUP (1f, 1f) LC0 = %0\n"
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"1: nop;"
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:
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: "a" (15 * 10)
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: "LC0", "LB0", "LT0"
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);
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/* Due to the way reset is handled in the hardware, we need
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* to delay for 10 SCLKS. The only reliable way to do this is
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* to calculate the CCLK/SCLK ratio and multiply 10. For now,
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* we'll assume worse case which is a 1:15 ratio.
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*/
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asm(
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"LSETUP (1f, 1f) LC0 = %0\n"
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"1: nop;"
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:
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: "a" (15 * 10)
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: "LC0", "LB0", "LT0"
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);
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/* Clear System software reset */
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bfin_write_SWRST(0);
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/* Clear System software reset */
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bfin_write_SWRST(0);
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/* The BF526 ROM will crash during reset */
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/* The BF526 ROM will crash during reset */
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#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
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bfin_read_SWRST();
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bfin_read_SWRST();
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#endif
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/* Wait for the SWRST write to complete. Cannot rely on SSYNC
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* though as the System state is all reset now.
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*/
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asm(
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"LSETUP (1f, 1f) LC1 = %0\n"
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"1: nop;"
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:
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: "a" (15 * 1)
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: "LC1", "LB1", "LT1"
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);
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}
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/* Wait for the SWRST write to complete. Cannot rely on SSYNC
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* though as the System state is all reset now.
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*/
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asm(
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"LSETUP (1f, 1f) LC1 = %0\n"
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"1: nop;"
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:
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: "a" (15 * 1)
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: "LC1", "LB1", "LT1"
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);
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while (1)
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/* Issue core reset */
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