[POWERPC] mpc5200: Allow for fixed speed MII configurations
Various improvements for configuring the MPC5200 MII link from the device tree: * Look for 'current-speed' property for fixed speed MII links * Look for 'fsl,7-wire-mode' property for boards using the 7 wire mode * move definition of private data structure out of the header file Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Wolfgang Grandegger <wg@grandegger.com>
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Grant Likely
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@ -237,6 +237,17 @@ Each GPIO controller node should have the empty property gpio-controller and
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according to the bit numbers in the GPIO control registers. The second cell
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is for flags which is currently unsused.
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8) FEC nodes
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The FEC node can specify one of the following properties to configure
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the MII link:
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"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
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mode instead of MII
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"current-speed" - Specifies that the MII should be configured for a fixed
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speed. This property should contain two cells. The
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first cell specifies the speed in Mbps and the second
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should be '0' for half duplex and '1' for full duplex
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"phy-handle" - Contains a phandle to an Ethernet PHY.
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IV - Extra Notes
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================
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@ -43,6 +43,29 @@
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#define DRIVER_NAME "mpc52xx-fec"
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#define FEC5200_PHYADDR_NONE (-1)
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#define FEC5200_PHYADDR_7WIRE (-2)
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/* Private driver data structure */
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struct mpc52xx_fec_priv {
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int duplex;
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int speed;
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int r_irq;
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int t_irq;
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struct mpc52xx_fec __iomem *fec;
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struct bcom_task *rx_dmatsk;
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struct bcom_task *tx_dmatsk;
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spinlock_t lock;
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int msg_enable;
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/* MDIO link details */
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int phy_addr;
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unsigned int phy_speed;
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struct phy_device *phydev;
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enum phy_state link;
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};
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static irqreturn_t mpc52xx_fec_interrupt(int, void *);
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static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *);
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static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *);
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@ -223,7 +246,7 @@ static int mpc52xx_fec_phy_start(struct net_device *dev)
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struct mpc52xx_fec_priv *priv = netdev_priv(dev);
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int err;
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if (!priv->has_phy)
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if (priv->phy_addr < 0)
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return 0;
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err = mpc52xx_fec_init_phy(dev);
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@ -243,7 +266,7 @@ static void mpc52xx_fec_phy_stop(struct net_device *dev)
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{
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struct mpc52xx_fec_priv *priv = netdev_priv(dev);
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if (!priv->has_phy)
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if (!priv->phydev)
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return;
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phy_disconnect(priv->phydev);
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@ -255,7 +278,7 @@ static void mpc52xx_fec_phy_stop(struct net_device *dev)
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static int mpc52xx_fec_phy_mii_ioctl(struct mpc52xx_fec_priv *priv,
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struct mii_ioctl_data *mii_data, int cmd)
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{
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if (!priv->has_phy)
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if (!priv->phydev)
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return -ENOTSUPP;
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return phy_mii_ioctl(priv->phydev, mii_data, cmd);
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@ -265,7 +288,7 @@ static void mpc52xx_fec_phy_hw_init(struct mpc52xx_fec_priv *priv)
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{
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struct mpc52xx_fec __iomem *fec = priv->fec;
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if (!priv->has_phy)
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if (priv->phydev)
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return;
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out_be32(&fec->mii_speed, priv->phy_speed);
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@ -704,7 +727,7 @@ static void mpc52xx_fec_start(struct net_device *dev)
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rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */
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rcntrl |= FEC_RCNTRL_FCE;
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if (priv->has_phy)
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if (priv->phy_addr != FEC5200_PHYADDR_7WIRE)
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rcntrl |= FEC_RCNTRL_MII_MODE;
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if (priv->duplex == DUPLEX_FULL)
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@ -864,7 +887,10 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
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struct net_device *ndev;
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struct mpc52xx_fec_priv *priv = NULL;
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struct resource mem;
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const phandle *ph;
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struct device_node *phy_node;
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const phandle *phy_handle;
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const u32 *prop;
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int prop_size;
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phys_addr_t rx_fifo;
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phys_addr_t tx_fifo;
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@ -948,26 +974,37 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
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mpc52xx_fec_get_paddr(ndev, ndev->dev_addr);
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priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT);
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priv->duplex = DUPLEX_FULL;
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/* is the phy present in device tree? */
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ph = of_get_property(op->node, "phy-handle", NULL);
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if (ph) {
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const unsigned int *prop;
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struct device_node *phy_dn;
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priv->has_phy = 1;
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/*
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* Link mode configuration
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*/
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phy_dn = of_find_node_by_phandle(*ph);
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prop = of_get_property(phy_dn, "reg", NULL);
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priv->phy_addr = *prop;
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/* Start with safe defaults for link connection */
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priv->phy_addr = FEC5200_PHYADDR_NONE;
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priv->speed = 100;
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priv->duplex = DUPLEX_HALF;
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priv->phy_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
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of_node_put(phy_dn);
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/* the 7-wire property means don't use MII mode */
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if (of_find_property(op->node, "fsl,7-wire-mode", NULL))
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priv->phy_addr = FEC5200_PHYADDR_7WIRE;
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/* Phy speed */
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priv->phy_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
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} else {
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dev_info(&ndev->dev, "can't find \"phy-handle\" in device"
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" tree, using 7-wire mode\n");
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/* The current speed preconfigures the speed of the MII link */
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prop = of_get_property(op->node, "current-speed", &prop_size);
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if (prop && (prop_size >= sizeof(u32) * 2)) {
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priv->speed = prop[0];
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priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF;
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}
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/* If there is a phy handle, setup link to that phy */
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phy_handle = of_get_property(op->node, "phy-handle", &prop_size);
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if (phy_handle && (prop_size >= sizeof(phandle))) {
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phy_node = of_find_node_by_phandle(*phy_handle);
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prop = of_get_property(phy_node, "reg", &prop_size);
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if (prop && (prop_size >= sizeof(u32)))
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if ((*prop >= 0) && (*prop < PHY_MAX_ADDR))
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priv->phy_addr = *prop;
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of_node_put(phy_node);
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}
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/* Hardware init */
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@ -982,6 +1019,20 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
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if (rv < 0)
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goto probe_error;
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/* Now report the link setup */
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switch (priv->phy_addr) {
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case FEC5200_PHYADDR_NONE:
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dev_info(&ndev->dev, "Fixed speed MII link: %i%cD\n",
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priv->speed, priv->duplex ? 'F' : 'H');
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break;
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case FEC5200_PHYADDR_7WIRE:
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dev_info(&ndev->dev, "using 7-wire PHY mode\n");
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break;
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default:
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dev_info(&ndev->dev, "Using PHY at MDIO address %i\n",
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priv->phy_addr);
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}
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/* We're done ! */
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dev_set_drvdata(&op->dev, ndev);
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@ -26,25 +26,6 @@
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#define FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000)
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struct mpc52xx_fec_priv {
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int duplex;
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int r_irq;
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int t_irq;
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struct mpc52xx_fec __iomem *fec;
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struct bcom_task *rx_dmatsk;
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struct bcom_task *tx_dmatsk;
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spinlock_t lock;
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int msg_enable;
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int has_phy;
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unsigned int phy_speed;
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unsigned int phy_addr;
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struct phy_device *phydev;
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enum phy_state link;
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int speed;
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};
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/* ======================================================================== */
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/* Hardware register sets & bits */
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/* ======================================================================== */
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