ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
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ca48080a03
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@ -25,6 +25,7 @@
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/reset.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <linux/clk/tegra.h>
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@ -144,11 +145,12 @@ int tegra_powergate_remove_clamping(int id)
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}
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/* Must be called with clk disabled, and returns with clk enabled */
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int tegra_powergate_sequence_power_up(int id, struct clk *clk)
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int tegra_powergate_sequence_power_up(int id, struct clk *clk,
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struct reset_control *rst)
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{
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int ret;
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tegra_periph_reset_assert(clk);
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reset_control_assert(rst);
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ret = tegra_powergate_power_on(id);
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if (ret)
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@ -165,7 +167,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
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goto err_clamp;
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udelay(10);
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tegra_periph_reset_deassert(clk);
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reset_control_deassert(rst);
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return 0;
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@ -279,7 +279,8 @@ static int gr3d_probe(struct platform_device *pdev)
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}
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}
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err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk);
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err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk,
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gr3d->rst);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to power up 3D unit\n");
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return err;
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@ -287,7 +288,8 @@ static int gr3d_probe(struct platform_device *pdev)
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if (gr3d->clk_secondary) {
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err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D1,
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gr3d->clk_secondary);
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gr3d->clk_secondary,
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gr3d->rst_secondary);
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if (err < 0) {
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dev_err(&pdev->dev,
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"failed to power up secondary 3D unit\n");
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@ -955,7 +955,8 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
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}
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err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
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pcie->pex_clk);
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pcie->pex_clk,
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pcie->pex_rst);
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if (err) {
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dev_err(pcie->dev, "powerup sequence failed: %d\n", err);
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return err;
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@ -19,6 +19,7 @@
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#define _MACH_TEGRA_POWERGATE_H_
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struct clk;
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struct reset_control;
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#define TEGRA_POWERGATE_CPU 0
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#define TEGRA_POWERGATE_3D 1
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@ -52,7 +53,8 @@ int tegra_powergate_power_off(int id);
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int tegra_powergate_remove_clamping(int id);
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/* Must be called with clk disabled, and returns with clk enabled */
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int tegra_powergate_sequence_power_up(int id, struct clk *clk);
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int tegra_powergate_sequence_power_up(int id, struct clk *clk,
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struct reset_control *rst);
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#else
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static inline int tegra_powergate_is_powered(int id)
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{
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@ -74,7 +76,8 @@ static inline int tegra_powergate_remove_clamping(int id)
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return -ENOSYS;
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}
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static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk)
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static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
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struct reset_control *rst);
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{
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return -ENOSYS;
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}
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