arm64: KVM: Switch vgic save/restore to alternative_insn
So far, we configured the world-switch by having a small array of pointers to the save and restore functions, depending on the GIC used on the platform. Loading these values each time is a bit silly (they never change), and it makes sense to rely on the instruction patching instead. This leads to a nice cleanup of the code. Acked-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -218,11 +218,6 @@ static inline int kvm_arch_dev_ioctl_check_extension(long ext)
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return 0;
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}
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static inline void vgic_arch_setup(const struct vgic_params *vgic)
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{
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BUG_ON(vgic->type != VGIC_V2);
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}
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int kvm_perf_init(void);
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int kvm_perf_teardown(void);
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@ -132,11 +132,6 @@ extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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extern u64 __vgic_v3_get_ich_vtr_el2(void);
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extern char __save_vgic_v2_state[];
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extern char __restore_vgic_v2_state[];
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extern char __save_vgic_v3_state[];
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extern char __restore_vgic_v3_state[];
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#endif
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#endif /* __ARM_KVM_ASM_H__ */
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@ -221,29 +221,6 @@ struct vgic_sr_vectors {
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void *restore_vgic;
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};
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static inline void vgic_arch_setup(const struct vgic_params *vgic)
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{
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extern struct vgic_sr_vectors __vgic_sr_vectors;
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switch(vgic->type)
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{
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case VGIC_V2:
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__vgic_sr_vectors.save_vgic = __save_vgic_v2_state;
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__vgic_sr_vectors.restore_vgic = __restore_vgic_v2_state;
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break;
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#ifdef CONFIG_ARM_GIC_V3
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case VGIC_V3:
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__vgic_sr_vectors.save_vgic = __save_vgic_v3_state;
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__vgic_sr_vectors.restore_vgic = __restore_vgic_v3_state;
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break;
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#endif
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default:
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BUG();
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}
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}
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static inline void kvm_arch_hardware_disable(void) {}
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static inline void kvm_arch_hardware_unsetup(void) {}
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static inline void kvm_arch_sync_events(struct kvm *kvm) {}
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@ -127,7 +127,6 @@ int main(void)
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DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
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DEFINE(VGIC_SAVE_FN, offsetof(struct vgic_sr_vectors, save_vgic));
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DEFINE(VGIC_RESTORE_FN, offsetof(struct vgic_sr_vectors, restore_vgic));
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DEFINE(VGIC_SR_VECTOR_SZ, sizeof(struct vgic_sr_vectors));
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DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));
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DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));
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DEFINE(VGIC_V2_CPU_MISR, offsetof(struct vgic_cpu, vgic_v2.vgic_misr));
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@ -17,8 +17,10 @@
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#include <linux/linkage.h>
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#include <asm/alternative.h>
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include <asm/cpufeature.h>
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#include <asm/debug-monitors.h>
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#include <asm/esr.h>
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#include <asm/fpsimdmacros.h>
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@ -808,10 +810,7 @@
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* Call into the vgic backend for state saving
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*/
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.macro save_vgic_state
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adr x24, __vgic_sr_vectors
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ldr x24, [x24, VGIC_SAVE_FN]
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kern_hyp_va x24
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blr x24
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alternative_insn "bl __save_vgic_v2_state", "bl __save_vgic_v3_state", ARM64_HAS_SYSREG_GIC_CPUIF
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mrs x24, hcr_el2
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mov x25, #HCR_INT_OVERRIDE
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neg x25, x25
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@ -828,10 +827,7 @@
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orr x24, x24, #HCR_INT_OVERRIDE
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orr x24, x24, x25
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msr hcr_el2, x24
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adr x24, __vgic_sr_vectors
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ldr x24, [x24, #VGIC_RESTORE_FN]
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kern_hyp_va x24
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blr x24
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alternative_insn "bl __restore_vgic_v2_state", "bl __restore_vgic_v3_state", ARM64_HAS_SYSREG_GIC_CPUIF
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.endm
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.macro save_timer_state
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@ -1062,12 +1058,6 @@ ENTRY(__kvm_flush_vm_context)
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ret
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ENDPROC(__kvm_flush_vm_context)
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// struct vgic_sr_vectors __vgi_sr_vectors;
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.align 3
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ENTRY(__vgic_sr_vectors)
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.skip VGIC_SR_VECTOR_SZ
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ENDPROC(__vgic_sr_vectors)
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__kvm_hyp_panic:
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// Guess the context by looking at VTTBR:
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// If zero, then we're already a host.
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@ -2128,9 +2128,6 @@ int kvm_vgic_hyp_init(void)
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goto out_free_irq;
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}
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/* Callback into for arch code for setup */
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vgic_arch_setup(vgic);
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on_each_cpu(vgic_init_maintenance_interrupt, NULL, 1);
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return 0;
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