[ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing
Patch from Tony Lindgren Update OMAP pin multiplexing code from linux-omap tree. This patch adds new pin configurations by various OMAP developers, and suport for omap730 by Brian Swetland. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Tony Lindgren
Russell King
parent
a569c6ec37
commit
8d7f9f5037
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@ -35,16 +35,20 @@
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#ifdef CONFIG_ARCH_OMAP730
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struct pin_config __initdata_or_module omap730_pins[] = {
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MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 0, 20, 1, NA, 0, 0)
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MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 0, 24, 1, NA, 0, 0)
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MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 0, 28, 1, NA, 0, 0)
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MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 0, 1, NA, 0, 0)
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MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 0, 4, 1, NA, 0, 0)
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MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 0, 8, 1, NA, 0, 0)
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MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 0, 12, 1, NA, 0, 0)
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MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 0, 16, 1, NA, 0, 0)
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MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 0, 20, 1, NA, 0, 0)
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MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 0, 24, 1, NA, 0, 0)
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MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0)
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MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0)
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MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0)
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MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0)
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MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0)
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MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0)
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MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0)
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MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0)
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MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0)
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MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0)
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MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0)
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MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0)
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MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0)
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};
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#endif
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@ -73,8 +77,8 @@ MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0)
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MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0)
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/* PWT & PWL, conflicts with UART3 */
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MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
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MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
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MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
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MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
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/* USB internal master generic */
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MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
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@ -151,7 +155,7 @@ MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
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/* Misc ballouts */
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MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
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MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
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MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
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/* OMAP-1610 MMC2 */
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MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
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@ -50,9 +50,54 @@ MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
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/* Menelaus interrupt */
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MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
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/* 24xx clocks */
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MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
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/* 24xx McBSP */
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MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
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MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
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MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
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MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
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/* 24xx GPIO */
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MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
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MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
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MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
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MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
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MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
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MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
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MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
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MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
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MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
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MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
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MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
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/* TSC IRQ */
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MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
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/* UART3 */
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MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
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MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
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/* Keypad GPIO*/
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MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
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MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
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MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
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MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
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MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
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MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
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MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
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MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
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MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
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MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
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MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
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MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
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MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
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/* 24xx Menelaus Keypad GPIO */
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MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
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MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
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MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
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};
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@ -112,14 +112,13 @@
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* as mux config
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*/
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#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \
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pull_reg, pull_bit, pull_status, \
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pu_pd_reg, pu_pd_status, debug_status)\
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pull_bit, pull_status, debug_status)\
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{ \
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.name = desc, \
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.debug = debug_status, \
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MUX_REG_730(mux_reg, mode_offset, mode) \
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PULL_REG_730(mux_reg, pull_bit, pull_status) \
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PU_PD_REG(pu_pd_reg, pu_pd_status) \
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PU_PD_REG(NA, 0) \
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},
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#define MUX_CFG_24XX(desc, reg_offset, mode, \
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@ -172,6 +171,11 @@ enum omap730_index {
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E4_730_KBC2,
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F4_730_KBC3,
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E3_730_KBC4,
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/* USB */
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AA17_730_USB_DM,
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W16_730_USB_PU_EN,
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W17_730_USB_VBUSI,
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};
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enum omap1xxx_index {
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@ -403,9 +407,53 @@ enum omap24xx_index {
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/* 24xx Menelaus interrupt */
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W19_24XX_SYS_NIRQ,
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/* 24xx clock */
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W14_24XX_SYS_CLKOUT,
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/* 242X McBSP */
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Y15_24XX_MCBSP2_CLKX,
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R14_24XX_MCBSP2_FSX,
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W15_24XX_MCBSP2_DR,
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V15_24XX_MCBSP2_DX,
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/* 24xx GPIO */
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M21_242X_GPIO11,
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AA10_242X_GPIO13,
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AA6_242X_GPIO14,
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AA4_242X_GPIO15,
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Y11_242X_GPIO16,
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AA12_242X_GPIO17,
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AA8_242X_GPIO58,
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Y20_24XX_GPIO60,
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W4__24XX_GPIO74,
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M15_24XX_GPIO92,
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V14_24XX_GPIO117,
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P20_24XX_TSC_IRQ,
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/* UART3 */
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K15_24XX_UART3_TX,
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K14_24XX_UART3_RX,
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/* Keypad GPIO*/
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T19_24XX_KBR0,
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R19_24XX_KBR1,
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V18_24XX_KBR2,
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M21_24XX_KBR3,
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E5__24XX_KBR4,
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M18_24XX_KBR5,
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R20_24XX_KBC0,
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M14_24XX_KBC1,
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H19_24XX_KBC2,
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V17_24XX_KBC3,
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P21_24XX_KBC4,
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L14_24XX_KBC5,
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N19_24XX_KBC6,
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/* 24xx Menelaus Keypad GPIO */
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B3__24XX_KBR5,
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AA4_24XX_KBC2,
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B13_24XX_KBC6,
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};
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#ifdef CONFIG_OMAP_MUX
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