pwm: atmel: Fix polarity handling
When atmel_pwm_config() calculates and then sets the prescaler, it is overwriting the channel's CMR register so we are losing the CPOL configuration. As atmel_pwm_config() is always called before enabling a channel, inverting the polarity doesn't work. Fix that by reading CMR first and only overwriting the prescaler bits. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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@ -32,6 +32,7 @@
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/* Bit field in CMR */
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#define PWM_CMR_CPOL (1 << 9)
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#define PWM_CMR_UPD_CDTY (1 << 10)
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#define PWM_CMR_CPRE_MSK 0xF
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/* The following registers for PWM v1 */
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#define PWMV1_CDTY 0x04
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@ -104,6 +105,7 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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unsigned long clk_rate, prd, dty;
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unsigned long long div;
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unsigned int pres = 0;
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u32 val;
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int ret;
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if (test_bit(PWMF_ENABLED, &pwm->flags) && (period_ns != pwm->period)) {
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@ -139,7 +141,10 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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return ret;
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}
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, pres);
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/* It is necessary to preserve CPOL, inside CMR */
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val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
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val = (val & ~PWM_CMR_CPRE_MSK) | (pres & PWM_CMR_CPRE_MSK);
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
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atmel_pwm->config(chip, pwm, dty, prd);
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clk_disable(atmel_pwm->clk);
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