Revert "serial: imx: initialized DMA w/o HW flow enabled"
This reverts commit 068500e08d
.
According to some tests, SDMA support is broken at least for i.MX6 without
HW flow control. Different forms of data-corruption appear either with
the ROM firmware for the SDMA controller as well as when loading Freescale
provided SDMA firmware versions 1.1 or 3.1.
Signed-off-by: David Jander <david@protonic.nl>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
dec273ecc1
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907eda32a3
@ -1121,11 +1121,6 @@ static int imx_startup(struct uart_port *port)
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writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
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/* Can we enable the DMA support? */
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if (is_imx6q_uart(sport) && !uart_console(port) &&
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!sport->dma_is_inited)
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imx_uart_dma_init(sport);
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spin_lock_irqsave(&sport->port.lock, flags);
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/* Reset fifo's and state machines */
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i = 100;
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@ -1143,9 +1138,6 @@ static int imx_startup(struct uart_port *port)
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writel(USR1_RTSD, sport->port.membase + USR1);
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writel(USR2_ORE, sport->port.membase + USR2);
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if (sport->dma_is_inited && !sport->dma_is_enabled)
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imx_enable_dma(sport);
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temp = readl(sport->port.membase + UCR1);
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temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN;
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@ -1316,6 +1308,11 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
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} else {
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ucr2 |= UCR2_CTSC;
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}
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/* Can we enable the DMA support? */
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if (is_imx6q_uart(sport) && !uart_console(port)
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&& !sport->dma_is_inited)
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imx_uart_dma_init(sport);
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} else {
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termios->c_cflag &= ~CRTSCTS;
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}
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@ -1432,6 +1429,8 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
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if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
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imx_enable_ms(&sport->port);
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if (sport->dma_is_inited && !sport->dma_is_enabled)
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imx_enable_dma(sport);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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