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MIPS: Avoid an FPE exception in FCSR mask probing

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Use the default FCSR value in mask probing, avoiding an FPE exception
where reset has left any exception enable and their corresponding cause
bits set and the register is then rewritten with these bits active.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki 2015-06-02 17:50:59 +01:00 committed by Ralf Baechle
parent a26484bb7e
commit 90b712ddab
1 changed files with 1 additions and 2 deletions
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3
arch/mips/kernel/cpu-probe.c
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@ -74,13 +74,12 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c)
{
unsigned long sr, mask, fcsr, fcsr0, fcsr1;
fcsr = c->fpu_csr31;
mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;
sr = read_c0_status();
__enable_fpu(FPU_AS_IS);
fcsr = read_32bit_cp1_register(CP1_STATUS);
fcsr0 = fcsr & mask;
write_32bit_cp1_register(CP1_STATUS, fcsr0);
fcsr0 = read_32bit_cp1_register(CP1_STATUS);